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ASoC: tegra-alt: fix aud mclk reset

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aud mclk reset is available only for t186, so move all the code
related to aud mclk reset under t186 chip check.

Bug 200365570

Change-Id: I2a7ff5eff583b138dca507336408779f5228a2d8
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1600769
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mohan Kumar
2017-11-18 13:47:22 +05:30
committed by Sameer Pujar
parent fbeffb7043
commit b9596edbb5
2 changed files with 15 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
sound/soc/tegra-alt/include/tegra_asoc_utils_alt.h
View File

@@ -33,6 +33,7 @@ struct device;
enum tegra_asoc_utils_soc { enum tegra_asoc_utils_soc {
TEGRA_ASOC_UTILS_SOC_TEGRA210, TEGRA_ASOC_UTILS_SOC_TEGRA210,
TEGRA_ASOC_UTILS_SOC_TEGRA186, TEGRA_ASOC_UTILS_SOC_TEGRA186,
TEGRA_ASOC_UTILS_SOC_TEGRA194,
}; };
/* Maintain same order in DT entry */ /* Maintain same order in DT entry */

27
sound/soc/tegra-alt/utils/tegra_asoc_utils_alt.c
View File

@@ -169,10 +169,9 @@ int tegra_alt_asoc_utils_clk_enable(struct tegra_asoc_audio_clock_info *data)
{ {
int err; int err;
#if defined(CONFIG_COMMON_CLK) if (data->soc == TEGRA_ASOC_UTILS_SOC_TEGRA186)
if (data->soc > TEGRA_ASOC_UTILS_SOC_TEGRA210)
reset_control_reset(data->clk_cdev1_rst); reset_control_reset(data->clk_cdev1_rst);
#endif
err = clk_prepare_enable(data->clk_cdev1); err = clk_prepare_enable(data->clk_cdev1);
if (err) { if (err) {
dev_err(data->dev, "Can't enable cdev1: %d\n", err); dev_err(data->dev, "Can't enable cdev1: %d\n", err);
@@ -207,6 +206,8 @@ int tegra_alt_asoc_utils_init(struct tegra_asoc_audio_clock_info *data,
data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA210; data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA210;
else if (of_machine_is_compatible("nvidia,tegra186")) else if (of_machine_is_compatible("nvidia,tegra186"))
data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA186; data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA186;
else if (of_machine_is_compatible("nvidia,tegra194"))
data->soc = TEGRA_ASOC_UTILS_SOC_TEGRA194;
else else
/* DT boot, but unknown SoC */ /* DT boot, but unknown SoC */
return -EINVAL; return -EINVAL;
@@ -247,17 +248,17 @@ int tegra_alt_asoc_utils_init(struct tegra_asoc_audio_clock_info *data,
goto err; goto err;
} }
#if defined(CONFIG_COMMON_CLK) if (data->soc == TEGRA_ASOC_UTILS_SOC_TEGRA186) {
data->clk_cdev1_rst = devm_reset_control_get(dev, data->clk_cdev1_rst = devm_reset_control_get(dev,
"extern1_rst"); "extern1_rst");
if (IS_ERR(data->clk_cdev1_rst)) { if (IS_ERR(data->clk_cdev1_rst)) {
dev_err(dev, "Reset control is not found, err: %ld\n", dev_err(dev,
PTR_ERR(data->clk_cdev1_rst)); "Reset control is not found, err: %ld\n",
return PTR_ERR(data->clk_cdev1_rst); PTR_ERR(data->clk_cdev1_rst));
return PTR_ERR(data->clk_cdev1_rst);
}
reset_control_reset(data->clk_cdev1_rst);
} }
reset_control_reset(data->clk_cdev1_rst);
#endif
} }
return 0; return 0;