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nvethernet: don't disable clks during suspend

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Issue:
During suspend EQOS/MGBE IP clocks are disabled.
SID will be programmed in controller registers
through HV window during resume. Register write
is not going through since clocks are disabled.

Fix: Don't disable the clocks during suspend.
BPMP will restore clks/resets context during resume.

Bug 200746622

Change-Id: Id96167d90b827109a047e3782a5b1d3c9b45c95a
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2679565
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Bhadram Varka
2022-03-10 18:15:23 +05:30
committed by Revanth Kumar Uppala
parent 36d76518df
commit bd4250519f
1 changed files with 0 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
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@@ -6642,9 +6642,6 @@ static int ether_suspend_noirq(struct device *dev)
free_dma_resources(pdata);
/* disable MAC clocks */
ether_disable_clks(pdata);
if (osi_core->mac == OSI_MAC_HW_MGBE)
pm_runtime_put_sync(pdata->dev);
@@ -6812,8 +6809,6 @@ static int ether_resume_noirq(struct device *dev)
if (!netif_running(ndev))
return 0;
ether_enable_clks(pdata);
if (!device_may_wakeup(&ndev->dev) &&
gpio_is_valid(pdata->phy_reset) &&
!gpio_get_value(pdata->phy_reset)) {