mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 17:25:35 +03:00
gpu: host1x: Deprecate falcon implementation from host1x driver
This commit deprecates the falcon hardware interface implementation from the host1x-nvhost driver. falcon_exit() function will be deprecated once usage of nvhost_module_deinit API is removed from PVA/DLA/Camera elements. Jira HOSTX-5933 Bug 4918838 Change-Id: I268836c8c8fc2f1ab060412bb4446c7080f846c4 Signed-off-by: Mainak Sen <msen@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3311319 Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Sanif Veeras <sveeras@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mainak Sen
@@ -6,6 +6,6 @@
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ccflags-y += -DCONFIG_TEGRA_HOST1X
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ccflags-y += -Werror
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host1x-nvhost-objs = nvhost.o falcon.o
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host1x-nvhost-objs = nvhost.o
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obj-m += host1x-nvhost.o
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@@ -1,213 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015-2023, NVIDIA Corporation. All rights reserved.
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/firmware.h>
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#include <linux/pci_ids.h>
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#include <linux/iopoll.h>
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#include "falcon.h"
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enum falcon_memory {
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FALCON_MEMORY_IMEM,
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FALCON_MEMORY_DATA,
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};
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static void falcon_writel(struct falcon *falcon, u32 value, u32 offset)
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{
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writel(value, falcon->regs + offset);
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}
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int falcon_wait_idle(struct falcon *falcon)
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{
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u32 value;
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return readl_poll_timeout(falcon->regs + FALCON_IDLESTATE, value,
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(value == 0), 10, 100000);
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}
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static int falcon_dma_wait_idle(struct falcon *falcon)
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{
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u32 value;
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return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value,
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(value & FALCON_DMATRFCMD_IDLE), 10, 100000);
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}
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static int falcon_copy_chunk(struct falcon *falcon,
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phys_addr_t base,
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unsigned long offset,
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enum falcon_memory target)
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{
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u32 cmd = FALCON_DMATRFCMD_SIZE_256B;
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if (target == FALCON_MEMORY_IMEM)
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cmd |= FALCON_DMATRFCMD_IMEM;
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falcon_writel(falcon, offset, FALCON_DMATRFMOFFS);
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falcon_writel(falcon, base, FALCON_DMATRFFBOFFS);
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falcon_writel(falcon, cmd, FALCON_DMATRFCMD);
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return falcon_dma_wait_idle(falcon);
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}
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static void falcon_copy_firmware_image(struct falcon *falcon,
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const struct firmware *firmware)
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{
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u32 *virt = falcon->firmware.virt;
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size_t i;
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/* copy the whole thing taking into account endianness */
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for (i = 0; i < firmware->size / sizeof(u32); i++)
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virt[i] = le32_to_cpu(((__le32 *)firmware->data)[i]);
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}
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static int falcon_parse_firmware_image(struct falcon *falcon)
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{
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struct falcon_fw_bin_header_v1 *bin = (void *)falcon->firmware.virt;
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struct falcon_fw_os_header_v1 *os;
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/* endian problems would show up right here */
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if (bin->magic != PCI_VENDOR_ID_NVIDIA && bin->magic != 0x10fe) {
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dev_err(falcon->dev, "incorrect firmware magic\n");
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return -EINVAL;
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}
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/* currently only version 1 is supported */
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if (bin->version != 1) {
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dev_err(falcon->dev, "unsupported firmware version\n");
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return -EINVAL;
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}
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/* check that the firmware size is consistent */
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if (bin->size > falcon->firmware.size) {
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dev_err(falcon->dev, "firmware image size inconsistency\n");
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return -EINVAL;
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}
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os = falcon->firmware.virt + bin->os_header_offset;
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falcon->firmware.bin_data.size = bin->os_size;
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falcon->firmware.bin_data.offset = bin->os_data_offset;
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falcon->firmware.code.offset = os->code_offset;
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falcon->firmware.code.size = os->code_size;
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falcon->firmware.data.offset = os->data_offset;
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falcon->firmware.data.size = os->data_size;
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return 0;
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}
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int falcon_read_firmware(struct falcon *falcon, const char *name)
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{
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int err, retry_count=10;
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retry_request:
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/* request_firmware prints error if it fails */
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err = request_firmware_direct(&falcon->firmware.firmware, name, falcon->dev);
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if (err == -EINTR && retry_count) {
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retry_count--;
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goto retry_request;
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}
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if (err < 0)
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return err;
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falcon->firmware.size = falcon->firmware.firmware->size;
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return 0;
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}
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int falcon_load_firmware(struct falcon *falcon)
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{
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const struct firmware *firmware = falcon->firmware.firmware;
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int err;
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/* copy firmware image into local area. this also ensures endianness */
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falcon_copy_firmware_image(falcon, firmware);
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/* parse the image data */
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err = falcon_parse_firmware_image(falcon);
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if (err < 0) {
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dev_err(falcon->dev, "failed to parse firmware image\n");
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return err;
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}
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release_firmware(firmware);
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falcon->firmware.firmware = NULL;
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return 0;
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}
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int falcon_init(struct falcon *falcon)
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{
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falcon->firmware.virt = NULL;
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return 0;
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}
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void falcon_exit(struct falcon *falcon)
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{
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if (falcon->firmware.firmware)
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release_firmware(falcon->firmware.firmware);
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}
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int falcon_boot(struct falcon *falcon)
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{
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unsigned long offset;
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u32 value;
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int err;
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if (!falcon->firmware.virt)
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return -EINVAL;
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err = readl_poll_timeout(falcon->regs + FALCON_DMACTL, value,
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(value & (FALCON_DMACTL_IMEM_SCRUBBING |
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FALCON_DMACTL_DMEM_SCRUBBING)) == 0,
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10, 10000);
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if (err < 0)
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return err;
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falcon_writel(falcon, 0, FALCON_DMACTL);
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/* setup the address of the binary data so Falcon can access it later */
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falcon_writel(falcon, (falcon->firmware.iova +
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falcon->firmware.bin_data.offset) >> 8,
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FALCON_DMATRFBASE);
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/* copy the data segment into Falcon internal memory */
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for (offset = 0; offset < falcon->firmware.data.size; offset += 256)
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falcon_copy_chunk(falcon,
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falcon->firmware.data.offset + offset,
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offset, FALCON_MEMORY_DATA);
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/* copy the code segment into Falcon internal memory */
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for (offset = 0; offset < falcon->firmware.code.size; offset += 256)
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falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset,
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offset, FALCON_MEMORY_IMEM);
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/* enable interface */
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falcon_writel(falcon, FALCON_ITFEN_MTHDEN |
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FALCON_ITFEN_CTXEN,
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FALCON_ITFEN);
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/* boot falcon */
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falcon_writel(falcon, 0x00000000, FALCON_BOOTVEC);
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falcon_writel(falcon, FALCON_CPUCTL_STARTCPU, FALCON_CPUCTL);
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err = falcon_wait_idle(falcon);
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if (err < 0) {
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dev_err(falcon->dev, "Falcon boot failed due to timeout\n");
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return err;
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}
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return 0;
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}
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void falcon_execute_method(struct falcon *falcon, u32 method, u32 data)
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{
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falcon_writel(falcon, method >> 2, FALCON_UCLASS_METHOD_OFFSET);
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falcon_writel(falcon, data, FALCON_UCLASS_METHOD_DATA);
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}
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@@ -1,114 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2022, NVIDIA Corporation. All rights reserved.
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*/
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#ifndef _FALCON_H_
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#define _FALCON_H_
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#include <linux/types.h>
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#define FALCON_UCLASS_METHOD_OFFSET 0x00000040
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#define FALCON_UCLASS_METHOD_DATA 0x00000044
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#define FALCON_IRQMSET 0x00001010
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#define FALCON_IRQMSET_WDTMR (1 << 1)
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#define FALCON_IRQMSET_HALT (1 << 4)
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#define FALCON_IRQMSET_EXTERR (1 << 5)
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#define FALCON_IRQMSET_SWGEN0 (1 << 6)
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#define FALCON_IRQMSET_SWGEN1 (1 << 7)
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#define FALCON_IRQMSET_EXT(v) (((v) & 0xff) << 8)
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#define FALCON_IRQDEST 0x0000101c
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#define FALCON_IRQDEST_HALT (1 << 4)
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#define FALCON_IRQDEST_EXTERR (1 << 5)
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#define FALCON_IRQDEST_SWGEN0 (1 << 6)
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#define FALCON_IRQDEST_SWGEN1 (1 << 7)
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#define FALCON_IRQDEST_EXT(v) (((v) & 0xff) << 8)
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#define FALCON_ITFEN 0x00001048
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#define FALCON_ITFEN_CTXEN (1 << 0)
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#define FALCON_ITFEN_MTHDEN (1 << 1)
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#define FALCON_IDLESTATE 0x0000104c
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#define FALCON_CPUCTL 0x00001100
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#define FALCON_CPUCTL_STARTCPU (1 << 1)
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#define FALCON_BOOTVEC 0x00001104
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#define FALCON_DMACTL 0x0000110c
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#define FALCON_DMACTL_DMEM_SCRUBBING (1 << 1)
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#define FALCON_DMACTL_IMEM_SCRUBBING (1 << 2)
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#define FALCON_DMATRFBASE 0x00001110
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#define FALCON_DMATRFMOFFS 0x00001114
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#define FALCON_DMATRFCMD 0x00001118
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#define FALCON_DMATRFCMD_IDLE (1 << 1)
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#define FALCON_DMATRFCMD_IMEM (1 << 4)
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#define FALCON_DMATRFCMD_SIZE_256B (6 << 8)
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#define FALCON_DMATRFFBOFFS 0x0000111c
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struct falcon_fw_bin_header_v1 {
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u32 magic; /* 0x10de */
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u32 version; /* version of bin format (1) */
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u32 size; /* entire image size including this header */
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u32 os_header_offset;
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u32 os_data_offset;
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u32 os_size;
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};
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struct falcon_fw_os_app_v1 {
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u32 offset;
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u32 size;
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};
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struct falcon_fw_os_header_v1 {
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u32 code_offset;
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u32 code_size;
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u32 data_offset;
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u32 data_size;
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};
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struct falcon_firmware_section {
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unsigned long offset;
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size_t size;
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};
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struct falcon_firmware {
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/* Firmware after it is read but not loaded */
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const struct firmware *firmware;
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/* Raw firmware data */
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dma_addr_t iova;
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dma_addr_t phys;
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void *virt;
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size_t size;
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/* Parsed firmware information */
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struct falcon_firmware_section bin_data;
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struct falcon_firmware_section data;
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struct falcon_firmware_section code;
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};
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struct falcon {
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/* Set by falcon client */
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struct device *dev;
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void __iomem *regs;
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struct falcon_firmware firmware;
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};
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int falcon_init(struct falcon *falcon);
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void falcon_exit(struct falcon *falcon);
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int falcon_read_firmware(struct falcon *falcon, const char *firmware_name);
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int falcon_load_firmware(struct falcon *falcon);
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int falcon_boot(struct falcon *falcon);
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void falcon_execute_method(struct falcon *falcon, u32 method, u32 data);
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int falcon_wait_idle(struct falcon *falcon);
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#endif /* _FALCON_H_ */
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@@ -20,8 +20,7 @@
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#include <linux/scatterlist.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include "falcon.h"
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#include <linux/firmware.h>
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#define TEGRA194_SYNCPT_PAGE_SIZE 0x1000
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#define TEGRA194_SYNCPT_SHIM_BASE 0x60000000
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@@ -39,6 +38,35 @@
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#define NVHOST_NUM_CDEV 1
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struct falcon_firmware_section {
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unsigned long offset;
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size_t size;
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};
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struct falcon_firmware {
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/* Firmware after it is read but not loaded */
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const struct firmware *firmware;
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/* Raw firmware data */
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dma_addr_t iova;
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dma_addr_t phys;
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void *virt;
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size_t size;
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/* Parsed firmware information */
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struct falcon_firmware_section bin_data;
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struct falcon_firmware_section data;
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struct falcon_firmware_section code;
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};
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struct falcon {
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/* Set by falcon client */
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struct device *dev;
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void __iomem *regs;
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struct falcon_firmware firmware;
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};
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struct nvhost_syncpt_interface {
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dma_addr_t base;
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size_t size;
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@@ -551,166 +579,6 @@ dma_addr_t nvhost_syncpt_address(struct platform_device *pdev, u32 id)
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}
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EXPORT_SYMBOL(nvhost_syncpt_address);
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static irqreturn_t flcn_isr(int irq, void *dev_id)
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{
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struct platform_device *pdev = (struct platform_device *)(dev_id);
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struct nvhost_device_data *pdata = nvhost_get_devdata(pdev);
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if (pdata->flcn_isr)
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pdata->flcn_isr(pdev);
|
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return IRQ_HANDLED;
|
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}
|
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int flcn_intr_init(struct platform_device *pdev)
|
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{
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struct nvhost_device_data *pdata = nvhost_get_devdata(pdev);
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int ret = 0;
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pdata->irq = platform_get_irq(pdev, 0);
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if (pdata->irq < 0) {
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dev_err(&pdev->dev, "failed to get IRQ\n");
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return -ENXIO;
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}
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ret = devm_request_irq(&pdev->dev, pdata->irq, flcn_isr, 0,
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dev_name(&pdev->dev), pdev);
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if (ret) {
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dev_err(&pdev->dev, "failed to request irq. err %d\n", ret);
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return ret;
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}
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/* keep irq disabled */
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disable_irq(pdata->irq);
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return 0;
|
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}
|
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EXPORT_SYMBOL(flcn_intr_init);
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int flcn_reload_fw(struct platform_device *pdev)
|
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{
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/* TODO: Used by debugfs */
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return -EOPNOTSUPP;
|
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}
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EXPORT_SYMBOL(flcn_reload_fw);
|
||||
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static int nvhost_flcn_init(struct platform_device *pdev,
|
||||
struct nvhost_device_data *pdata)
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{
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struct falcon *falcon;
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||||
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||||
falcon = devm_kzalloc(&pdev->dev, sizeof(*falcon), GFP_KERNEL);
|
||||
if (!falcon)
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return -ENOMEM;
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||||
|
||||
falcon->dev = &pdev->dev;
|
||||
falcon->regs = pdata->aperture[0];
|
||||
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||||
falcon_init(falcon);
|
||||
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||||
pdata->falcon_data = falcon;
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||||
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return 0;
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||||
}
|
||||
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||||
int nvhost_flcn_prepare_poweroff(struct platform_device *pdev)
|
||||
{
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struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
||||
|
||||
if (pdata->flcn_isr)
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disable_irq(pdata->irq);
|
||||
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||||
return 0;
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||||
}
|
||||
EXPORT_SYMBOL(nvhost_flcn_prepare_poweroff);
|
||||
|
||||
static int nvhost_flcn_load_firmware(struct platform_device *pdev,
|
||||
struct falcon *falcon,
|
||||
char *firmware_name)
|
||||
{
|
||||
dma_addr_t iova;
|
||||
size_t size;
|
||||
void *virt;
|
||||
int err;
|
||||
|
||||
if (falcon->firmware.virt)
|
||||
return 0;
|
||||
|
||||
err = falcon_read_firmware(falcon, firmware_name);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
size = falcon->firmware.size;
|
||||
virt = dma_alloc_coherent(&pdev->dev, size, &iova, GFP_KERNEL);
|
||||
if (!virt)
|
||||
return -ENOMEM;
|
||||
|
||||
falcon->firmware.virt = virt;
|
||||
falcon->firmware.iova = iova;
|
||||
|
||||
err = falcon_load_firmware(falcon);
|
||||
if (err < 0)
|
||||
goto cleanup;
|
||||
|
||||
return 0;
|
||||
|
||||
cleanup:
|
||||
dma_free_coherent(&pdev->dev, size, virt, iova);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
int nvhost_flcn_finalize_poweron(struct platform_device *pdev)
|
||||
{
|
||||
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
||||
#ifdef CONFIG_IOMMU_API
|
||||
struct iommu_fwspec *spec = dev_iommu_fwspec_get(&pdev->dev);
|
||||
#endif
|
||||
struct falcon *falcon;
|
||||
int err;
|
||||
u32 value;
|
||||
|
||||
if (!pdata->falcon_data) {
|
||||
err = nvhost_flcn_init(pdev, pdata);
|
||||
if (err < 0)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
falcon = pdata->falcon_data;
|
||||
|
||||
err = nvhost_flcn_load_firmware(pdev, falcon, pdata->firmware_name);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
#ifdef CONFIG_IOMMU_API
|
||||
if (spec) {
|
||||
host1x_writel(pdev, pdata->transcfg_addr, pdata->transcfg_val);
|
||||
|
||||
if (spec->num_ids > 0) {
|
||||
value = spec->ids[0] & 0xffff;
|
||||
host1x_writel(pdev, THI_STREAMID0, value);
|
||||
host1x_writel(pdev, THI_STREAMID1, value);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
err = falcon_boot(falcon);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
err = falcon_wait_idle(falcon);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "falcon boot timed out\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
if (pdata->flcn_isr)
|
||||
enable_irq(pdata->irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(nvhost_flcn_finalize_poweron);
|
||||
|
||||
struct nvhost_host1x_cb {
|
||||
struct dma_fence_cb cb;
|
||||
struct work_struct work;
|
||||
@@ -782,6 +650,12 @@ int nvhost_intr_register_notifier(struct platform_device *pdev,
|
||||
}
|
||||
EXPORT_SYMBOL(nvhost_intr_register_notifier);
|
||||
|
||||
static void falcon_exit(struct falcon *falcon)
|
||||
{
|
||||
if (falcon->firmware.firmware)
|
||||
release_firmware(falcon->firmware.firmware);
|
||||
}
|
||||
|
||||
void nvhost_module_deinit(struct platform_device *pdev)
|
||||
{
|
||||
struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
|
||||
|
||||
@@ -178,11 +178,6 @@ struct nvhost_device_data *nvhost_get_devdata(struct platform_device *pdev)
|
||||
return (struct nvhost_device_data *)platform_get_drvdata(pdev);
|
||||
}
|
||||
|
||||
int flcn_intr_init(struct platform_device *pdev);
|
||||
int flcn_reload_fw(struct platform_device *pdev);
|
||||
int nvhost_flcn_prepare_poweroff(struct platform_device *pdev);
|
||||
int nvhost_flcn_finalize_poweron(struct platform_device *dev);
|
||||
|
||||
/* public api to return platform_device ptr to the default host1x instance */
|
||||
struct platform_device *nvhost_get_default_device(void);
|
||||
struct platform_device *nvhost_get_host1x_device(int instance);
|
||||
|
||||
Reference in New Issue
Block a user