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nvethernet: Add support for VM interrupts

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Adds VM interrupt handling for VM interrupt
based MAC controllers.

Need to pass below parameters from DT -
o Number of VM IRQ's assigned per OS/VM.
o Number of VM channels assigned to a VM IRQ.
o List of DMA channels assigned to a VM IRQ.

Below is the sample DT representation -

vm_irq_config: vm-irq-config {
	nvidia,num-vm-irqs = <4>;
	vm_irq1 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <0 1>;
	};
	vm_irq2 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <2 3>;
	};
	vm_irq3 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <4 5>;
	};
	vm_irq4 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <6 7>;
	};
};

ethernet@<base_addr> {
	[...]
	nvidia,vm-irq-config = <&vm_irq_config>;
	[...]
}

Bug 200548572

Change-Id: I802f247fa95ef6dcd769afbc7c13c6362d2f328e
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2292602
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Bhadram Varka
2019-06-26 20:22:43 +05:30
committed by Revanth Kumar Uppala
parent 3c81e255bd
commit c4a75f03ac
2 changed files with 312 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/net/ethernet/nvidia/nvethernet/ether_linux.h
View File

@@ -193,6 +193,10 @@ static inline int ether_avail_txdesc_cnt(struct osi_tx_ring *tx_ring)
* 36 second for 1 G interface and 3.6 sec for 10 G interface.
*/
#define ETHER_STATS_TIMER 3U
#define ETHER_VM_IRQ_TX_CHAN_MASK(x) BIT((x) * 2U)
#define ETHER_VM_IRQ_RX_CHAN_MASK(x) BIT(((x) * 2U) + 1U)
/**
* @brief DMA Transmit Channel NAPI
*/
@@ -221,6 +225,16 @@ struct ether_rx_napi {
struct napi_struct napi;
};
/**
* @brief VM Based IRQ data
*/
struct ether_vm_irq_data {
/** List of DMA Tx/Rx channel mask */
unsigned int chan_mask;
/** OSD private data */
struct ether_priv_data *pdata;
};
/**
* @brief Ethernet driver private data
*/
@@ -284,6 +298,8 @@ struct ether_priv_data {
int tx_irqs[ETHER_MAX_IRQS];
/** Array of DMA Receive channel IRQ numbers */
int rx_irqs[ETHER_MAX_IRQS];
/** Array of VM IRQ numbers */
int vm_irqs[OSI_MAX_VM_IRQS];
/** memory allocation mask */
unsigned long long dma_mask;
/** Current state of features enabled in HW*/
@@ -349,6 +365,8 @@ struct ether_priv_data {
struct work_struct ivc_work;
/** Flag which decides stats is enabled(1) or disabled(0) */
unsigned int use_stats;
/** VM channel info data associated with VM IRQ */
struct ether_vm_irq_data *vm_irq_data;
};
/**