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nvethernet: T26x EQOS changes

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1) Added T26X EQOS bring up changes
2) Fixes added during bring up

Bug 4639097

Change-Id: I624fc5c2f9ef4304fe2ae1df6905195d7d969c68
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3152935
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Narayana Reddy P <narayanr@nvidia.com>
This commit is contained in:
Mahesh Patil
2024-05-07 16:03:37 -07:00
committed by mobile promotions
parent 9d4d563987
commit c765f98235
4 changed files with 83 additions and 71 deletions
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95
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
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@@ -486,7 +486,7 @@ static void ether_disable_eqos_clks(struct ether_priv_data *pdata)
clk_disable_unprepare(pdata->tx_clk); clk_disable_unprepare(pdata->tx_clk);
} }
if (pdata->osi_core->mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40) { if (pdata->osi_core->mac_ver == OSI_EQOS_MAC_5_40) {
if (!IS_ERR_OR_NULL(pdata->rx_pcs_input_clk)) { if (!IS_ERR_OR_NULL(pdata->rx_pcs_input_clk)) {
clk_disable_unprepare(pdata->rx_pcs_input_clk); clk_disable_unprepare(pdata->rx_pcs_input_clk);
} }
@@ -572,7 +572,7 @@ static int ether_enable_mgbe_clks(struct ether_priv_data *pdata)
} }
if (!IS_ERR_OR_NULL(pdata->tx_clk)) { if (!IS_ERR_OR_NULL(pdata->tx_clk)) {
if (uphy_gbe_mode == OSI_UPHY_GBE_MODE_25G) if (uphy_gbe_mode == OSI_GBE_MODE_25G)
rate = ETHER_MGBE_TXRX_CLK_XAUI_25G; rate = ETHER_MGBE_TXRX_CLK_XAUI_25G;
else if (uphy_gbe_mode == OSI_GBE_MODE_10G) else if (uphy_gbe_mode == OSI_GBE_MODE_10G)
rate = ETHER_MGBE_TX_CLK_USXGMII_10G; rate = ETHER_MGBE_TX_CLK_USXGMII_10G;
@@ -592,7 +592,7 @@ static int ether_enable_mgbe_clks(struct ether_priv_data *pdata)
} }
if (!IS_ERR_OR_NULL(pdata->tx_pcs_clk)) { if (!IS_ERR_OR_NULL(pdata->tx_pcs_clk)) {
if (uphy_gbe_mode == OSI_UPHY_GBE_MODE_25G) if (uphy_gbe_mode == OSI_GBE_MODE_25G)
rate = ETHER_MGBE_TXRX_PCS_CLK_XAUI_25G; rate = ETHER_MGBE_TXRX_PCS_CLK_XAUI_25G;
else if (uphy_gbe_mode == OSI_GBE_MODE_10G) else if (uphy_gbe_mode == OSI_GBE_MODE_10G)
rate = ETHER_MGBE_TX_PCS_CLK_USXGMII_10G; rate = ETHER_MGBE_TX_PCS_CLK_USXGMII_10G;
@@ -757,6 +757,15 @@ static int ether_enable_eqos_clks_t26x(struct ether_priv_data *pdata)
} }
} }
if (!IS_ERR_OR_NULL(pdata->app_clk)) { if (!IS_ERR_OR_NULL(pdata->app_clk)) {
if (uphy_gbe_mode == OSI_GBE_MODE_2_5G)
rate = ETHER_EQOS_TX_CLK_2_5G;
else
rate = ETHER_EQOS_TX_CLK_1000M;
ret = clk_set_rate(pdata->app_clk, rate);
if (ret < 0) {
dev_err(pdata->dev, "failed to set EQOS app_clk rate\n");
goto err_tx;
}
ret = clk_prepare_enable(pdata->app_clk); ret = clk_prepare_enable(pdata->app_clk);
if (ret < 0) { if (ret < 0) {
goto err_app; goto err_app;
@@ -901,7 +910,7 @@ static int ether_enable_clks(struct ether_priv_data *pdata)
if (pdata->osi_core->use_virtualization == OSI_DISABLE) { if (pdata->osi_core->use_virtualization == OSI_DISABLE) {
if (pdata->osi_core->mac != OSI_MAC_HW_EQOS) { if (pdata->osi_core->mac != OSI_MAC_HW_EQOS) {
return ether_enable_mgbe_clks(pdata); return ether_enable_mgbe_clks(pdata);
} else if (pdata->osi_core->mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40) { } else if (pdata->osi_core->mac_ver_type == MAC_CORE_VER_TYPE_EQOS_5_40) {
return ether_enable_eqos_clks_t26x(pdata); return ether_enable_eqos_clks_t26x(pdata);
} else { } else {
return ether_enable_eqos_clks(pdata); return ether_enable_eqos_clks(pdata);
@@ -1068,6 +1077,7 @@ static inline void set_speed_work_func(struct work_struct *work)
int ret = 0; int ret = 0;
if ((pdata->osi_core->mac != OSI_MAC_HW_MGBE) && if ((pdata->osi_core->mac != OSI_MAC_HW_MGBE) &&
(pdata->osi_core->mac_ver != OSI_EQOS_MAC_5_40) &&
(pdata->osi_core->mac != OSI_MAC_HW_MGBE_T26X)) { (pdata->osi_core->mac != OSI_MAC_HW_MGBE_T26X)) {
/* Handle retry for MGBE */ /* Handle retry for MGBE */
return; return;
@@ -1096,6 +1106,12 @@ static inline void set_speed_work_func(struct work_struct *work)
speed = OSI_SPEED_5000; speed = OSI_SPEED_5000;
} }
if (pdata->osi_core->uphy_gbe_mode == OSI_GBE_MODE_2_5G) {
speed = OSI_SPEED_2500;
} else if (pdata->osi_core->uphy_gbe_mode == OSI_GBE_MODE_1G) {
speed = OSI_SPEED_1000;
}
/* Initiate OSI SET_SPEED ioctl */ /* Initiate OSI SET_SPEED ioctl */
ioctl_data.cmd = OSI_CMD_SET_SPEED; ioctl_data.cmd = OSI_CMD_SET_SPEED;
ioctl_data.arg6_32 = speed; ioctl_data.arg6_32 = speed;
@@ -1113,6 +1129,9 @@ static inline void set_speed_work_func(struct work_struct *work)
phy_print_status(phydev); phy_print_status(phydev);
mac_clk = (pdata->osi_core->mac == OSI_MAC_HW_MGBE_T26X)? pdata->mac_clk: mac_clk = (pdata->osi_core->mac == OSI_MAC_HW_MGBE_T26X)? pdata->mac_clk:
pdata->mac_div_clk; pdata->mac_div_clk;
if (pdata->osi_core->mac_ver == OSI_EQOS_MAC_5_40) {
mac_clk = pdata->mac_clk;
}
ether_set_mgbe_mac_div_rate(mac_clk, pdata->speed); ether_set_mgbe_mac_div_rate(mac_clk, pdata->speed);
#ifndef OSI_STRIPPED_LIB #ifndef OSI_STRIPPED_LIB
@@ -1223,7 +1242,7 @@ static void ether_adjust_link(struct net_device *dev)
if (pdata->fixed_link == OSI_ENABLE) { if (pdata->fixed_link == OSI_ENABLE) {
if (mac != OSI_MAC_HW_EQOS) { if (mac != OSI_MAC_HW_EQOS) {
if (iface_mode == OSI_XAUI_MODE_25G) { if (uphy_gbe_mode == OSI_GBE_MODE_25G) {
phydev->speed = OSI_SPEED_25000; phydev->speed = OSI_SPEED_25000;
} else if (iface_mode == OSI_XFI_MODE_10G) { } else if (iface_mode == OSI_XFI_MODE_10G) {
phydev->speed = OSI_SPEED_10000; phydev->speed = OSI_SPEED_10000;
@@ -1300,17 +1319,19 @@ static void ether_adjust_link(struct net_device *dev)
* PHY line side = 1G/100M/10M * PHY line side = 1G/100M/10M
*/ */
if ((mac != OSI_MAC_HW_EQOS) || if ((mac != OSI_MAC_HW_EQOS) ||
(mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40)) { (mac_ver == OSI_EQOS_MAC_5_40)) {
/* MAC and XFI/XAUI speed should match in /* MAC and XFI/XAUI speed should match in
* XFI/XAUI mode * XFI/XAUI mode
*/ */
if (iface_mode == OSI_XAUI_MODE_25G) { if (uphy_gbe_mode == OSI_GBE_MODE_25G) {
speed = OSI_SPEED_25000; speed = OSI_SPEED_25000;
} else if (iface_mode == OSI_XFI_MODE_10G) { } else if (iface_mode == OSI_XFI_MODE_10G) {
speed = OSI_SPEED_10000; speed = OSI_SPEED_10000;
} else if (iface_mode == OSI_XFI_MODE_5G) { } else if (iface_mode == OSI_XFI_MODE_5G) {
speed = OSI_SPEED_5000; speed = OSI_SPEED_5000;
} else if (uphy_gbe_mode == OSI_GBE_MODE_2_5G) { }
if (uphy_gbe_mode == OSI_GBE_MODE_2_5G) {
speed = OSI_SPEED_2500; speed = OSI_SPEED_2500;
} }
} }
@@ -1319,7 +1340,7 @@ static void ether_adjust_link(struct net_device *dev)
ret = osi_handle_ioctl(pdata->osi_core, &ioctl_data); ret = osi_handle_ioctl(pdata->osi_core, &ioctl_data);
if (ret < 0) { if (ret < 0) {
if ((mac != OSI_MAC_HW_EQOS) || if ((mac != OSI_MAC_HW_EQOS) ||
(mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40)) { (mac_ver == OSI_EQOS_MAC_5_40)) {
netdev_dbg(dev, "Retry set speed\n"); netdev_dbg(dev, "Retry set speed\n");
netif_carrier_off(dev); netif_carrier_off(dev);
schedule_delayed_work(&pdata->set_speed_work, schedule_delayed_work(&pdata->set_speed_work,
@@ -1377,7 +1398,7 @@ static void ether_adjust_link(struct net_device *dev)
mac_clk = (mac == OSI_MAC_HW_MGBE_T26X)? pdata->mac_clk: mac_clk = (mac == OSI_MAC_HW_MGBE_T26X)? pdata->mac_clk:
pdata->mac_div_clk; pdata->mac_div_clk;
ether_set_mgbe_mac_div_rate(mac_clk, pdata->speed); ether_set_mgbe_mac_div_rate(mac_clk, pdata->speed);
} else if(mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40) { } else if(mac_ver == OSI_EQOS_MAC_5_40) {
ether_set_eqos_tx_clk(pdata->mac_clk, ether_set_eqos_tx_clk(pdata->mac_clk,
phydev->speed); phydev->speed);
} else { } else {
@@ -5393,7 +5414,7 @@ static void ether_put_eqos_clks(struct ether_priv_data *pdata)
devm_clk_put(dev, pdata->rx_m_clk); devm_clk_put(dev, pdata->rx_m_clk);
} }
if (pdata->osi_core->mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40) { if (pdata->osi_core->mac_ver == OSI_EQOS_MAC_5_40) {
if (!IS_ERR_OR_NULL(pdata->rx_pcs_m_clk)) { if (!IS_ERR_OR_NULL(pdata->rx_pcs_m_clk)) {
devm_clk_put(dev, pdata->rx_pcs_m_clk); devm_clk_put(dev, pdata->rx_pcs_m_clk);
} }
@@ -5467,7 +5488,7 @@ static int ether_set_mgbe_rx_fmon_rates(struct ether_priv_data *pdata)
unsigned long rx_rate, rx_pcs_rate; unsigned long rx_rate, rx_pcs_rate;
int ret; int ret;
if (uphy_gbe_mode == OSI_XAUI_MODE_25G) { if (uphy_gbe_mode == OSI_GBE_MODE_25G) {
rx_rate = ETHER_MGBE_TXRX_CLK_XAUI_25G; rx_rate = ETHER_MGBE_TXRX_CLK_XAUI_25G;
rx_pcs_rate = ETHER_MGBE_TXRX_PCS_CLK_XAUI_25G; rx_pcs_rate = ETHER_MGBE_TXRX_PCS_CLK_XAUI_25G;
} else if (uphy_gbe_mode == OSI_GBE_MODE_10G) { } else if (uphy_gbe_mode == OSI_GBE_MODE_10G) {
@@ -5647,7 +5668,7 @@ static int ether_get_eqos_clks(struct ether_priv_data *pdata)
struct device *dev = pdata->dev; struct device *dev = pdata->dev;
int ret; int ret;
if (pdata->osi_core->mac_ver == MAC_CORE_VER_TYPE_EQOS_5_40) { if (pdata->osi_core->mac_ver_type == MAC_CORE_VER_TYPE_EQOS_5_40) {
pdata->mac_clk = devm_clk_get(dev, "eqos_mac"); pdata->mac_clk = devm_clk_get(dev, "eqos_mac");
if (IS_ERR(pdata->mac_clk)) { if (IS_ERR(pdata->mac_clk)) {
ret = PTR_ERR(pdata->mac_clk); ret = PTR_ERR(pdata->mac_clk);
@@ -5858,15 +5879,14 @@ static int ether_configure_car(struct platform_device *pdev,
} }
} }
if (osi_core->mac != OSI_MAC_HW_EQOS) { if ((osi_core->mac != OSI_MAC_HW_EQOS) ||
(osi_core->mac_ver_type == MAC_CORE_VER_TYPE_EQOS_5_40)) {
pdata->xpcs_rst = devm_reset_control_get(&pdev->dev, pdata->xpcs_rst = devm_reset_control_get(&pdev->dev,
"pcs"); "pcs");
if (IS_ERR_OR_NULL(pdata->xpcs_rst)) { if (IS_ERR_OR_NULL(pdata->xpcs_rst)) {
dev_info(&pdev->dev, "failed to get XPCS reset\n"); dev_info(&pdev->dev, "failed to get XPCS reset\n");
return PTR_ERR(pdata->xpcs_rst); return PTR_ERR(pdata->xpcs_rst);
} }
} else {
pdata->xpcs_rst = NULL;
} }
/* get PHY reset */ /* get PHY reset */
@@ -6021,7 +6041,8 @@ static int ether_init_plat_resources(struct platform_device *pdev,
osi_dma->base = osi_core->base; osi_dma->base = osi_core->base;
} }
if (osi_core->mac != OSI_MAC_HW_EQOS) { if ((osi_core->mac != OSI_MAC_HW_EQOS) ||
(osi_core->mac_ver_type == MAC_CORE_VER_TYPE_EQOS_5_40)) {
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"xpcs"); "xpcs");
if (res) { if (res) {
@@ -6032,8 +6053,6 @@ static int ether_init_plat_resources(struct platform_device *pdev,
return PTR_ERR(osi_core->xpcs_base); return PTR_ERR(osi_core->xpcs_base);
} }
} }
} else {
osi_core->xpcs_base = NULL;
} }
if (osi_core->use_virtualization == OSI_DISABLE) { if (osi_core->use_virtualization == OSI_DISABLE) {
@@ -6683,7 +6702,7 @@ static int ether_parse_dt(struct ether_priv_data *pdata)
if (osi_core->mac != OSI_MAC_HW_EQOS) { if (osi_core->mac != OSI_MAC_HW_EQOS) {
if ((osi_core->uphy_gbe_mode != OSI_GBE_MODE_5G) && if ((osi_core->uphy_gbe_mode != OSI_GBE_MODE_5G) &&
(osi_core->uphy_gbe_mode != OSI_GBE_MODE_10G) && (osi_core->uphy_gbe_mode != OSI_GBE_MODE_10G) &&
(osi_core->uphy_gbe_mode != OSI_UPHY_GBE_MODE_25G)) { (osi_core->uphy_gbe_mode != OSI_GBE_MODE_25G)) {
dev_err(dev, "Invalid UPHY GBE mode" dev_err(dev, "Invalid UPHY GBE mode"
"- default to 10G\n"); "- default to 10G\n");
osi_core->uphy_gbe_mode = OSI_GBE_MODE_10G; osi_core->uphy_gbe_mode = OSI_GBE_MODE_10G;
@@ -6710,36 +6729,22 @@ static int ether_parse_dt(struct ether_priv_data *pdata)
if ((osi_core->phy_iface_mode != OSI_XFI_MODE_10G) && if ((osi_core->phy_iface_mode != OSI_XFI_MODE_10G) &&
(osi_core->phy_iface_mode != OSI_XFI_MODE_5G) && (osi_core->phy_iface_mode != OSI_XFI_MODE_5G) &&
(osi_core->phy_iface_mode != OSI_USXGMII_MODE_10G) && (osi_core->phy_iface_mode != OSI_USXGMII_MODE_10G) &&
(osi_core->phy_iface_mode != OSI_USXGMII_MODE_5G) && (osi_core->phy_iface_mode != OSI_USXGMII_MODE_5G)) {
(osi_core->phy_iface_mode != OSI_XAUI_MODE_25G)) {
dev_err(dev, "Invalid PHY iface mode" dev_err(dev, "Invalid PHY iface mode"
"- default to 10G\n"); "- default to 10G\n");
osi_core->phy_iface_mode = OSI_XFI_MODE_10G; osi_core->phy_iface_mode = OSI_XFI_MODE_10G;
} }
/* GBE and XAUI must be in same mode */
if ((osi_core->uphy_gbe_mode == OSI_UPHY_GBE_MODE_25G) &&
((osi_core->phy_iface_mode == OSI_XFI_MODE_5G) ||
(osi_core->phy_iface_mode == OSI_USXGMII_MODE_5G) ||
(osi_core->phy_iface_mode == OSI_XFI_MODE_10G) ||
(osi_core->phy_iface_mode == OSI_USXGMII_MODE_10G))) {
dev_err(dev, "Invalid combination of UPHY 25GBE mode"
"and XFI/USXGMII/XAUI mode\n");
return -EINVAL;
}
if ((osi_core->uphy_gbe_mode == OSI_GBE_MODE_10G) && if ((osi_core->uphy_gbe_mode == OSI_GBE_MODE_10G) &&
((osi_core->phy_iface_mode == OSI_XFI_MODE_5G) || ((osi_core->phy_iface_mode == OSI_XFI_MODE_5G) ||
(osi_core->phy_iface_mode == OSI_USXGMII_MODE_5G) || (osi_core->phy_iface_mode == OSI_USXGMII_MODE_5G))) {
(osi_core->phy_iface_mode == OSI_XAUI_MODE_25G))) {
dev_err(dev, "Invalid combination of UPHY 10GBE mode" dev_err(dev, "Invalid combination of UPHY 10GBE mode"
"and XFI/USXGMII/AUXA mode\n"); "and XFI/USXGMII/AUXA mode\n");
return -EINVAL; return -EINVAL;
} }
if ((osi_core->uphy_gbe_mode == OSI_GBE_MODE_5G) && if ((osi_core->uphy_gbe_mode == OSI_GBE_MODE_5G) &&
((osi_core->phy_iface_mode == OSI_XFI_MODE_10G) || ((osi_core->phy_iface_mode == OSI_XFI_MODE_10G) ||
(osi_core->phy_iface_mode == OSI_USXGMII_MODE_10G) || (osi_core->phy_iface_mode == OSI_USXGMII_MODE_10G))) {
(osi_core->phy_iface_mode == OSI_XAUI_MODE_25G))) {
dev_err(dev, "Invalid combination of UPHY 5GBE mode" dev_err(dev, "Invalid combination of UPHY 5GBE mode"
"and XFI/USXGMII/XAUI mode\n"); "and XFI/USXGMII/XAUI mode\n");
return -EINVAL; return -EINVAL;
@@ -6752,7 +6757,8 @@ static int ether_parse_dt(struct ether_priv_data *pdata)
goto exit; goto exit;
} }
if (osi_core->mac == OSI_MAC_HW_EQOS) { if ((osi_core->mac == OSI_MAC_HW_EQOS) &&
(osi_core->mac_ver_type != MAC_CORE_VER_TYPE_EQOS_5_40)) {
/* Read pad calibration enable/disable input, default enable */ /* Read pad calibration enable/disable input, default enable */
ret = of_property_read_u32(np, "nvidia,pad_calibration", ret = of_property_read_u32(np, "nvidia,pad_calibration",
&dt_pad_calibration_enable); &dt_pad_calibration_enable);
@@ -6887,6 +6893,7 @@ exit:
static void ether_get_num_dma_chan_mtl_q(struct platform_device *pdev, static void ether_get_num_dma_chan_mtl_q(struct platform_device *pdev,
unsigned int *num_dma_chans, unsigned int *num_dma_chans,
unsigned int *mac, unsigned int *mac,
unsigned int *mac_ver_type,
unsigned int *macsec, unsigned int *macsec,
unsigned int *num_mtl_queues) unsigned int *num_mtl_queues)
{ {
@@ -6898,6 +6905,7 @@ static void ether_get_num_dma_chan_mtl_q(struct platform_device *pdev,
ret = of_device_is_compatible(np, "nvidia,nveqos"); ret = of_device_is_compatible(np, "nvidia,nveqos");
if (ret != 0) { if (ret != 0) {
*mac = OSI_MAC_HW_EQOS; *mac = OSI_MAC_HW_EQOS;
*mac_ver_type = MAC_CORE_VER_TYPE_EQOS;
*macsec = OSI_MACSEC_T23X; *macsec = OSI_MACSEC_T23X;
max_chans = OSI_EQOS_MAX_NUM_CHANS; max_chans = OSI_EQOS_MAX_NUM_CHANS;
} }
@@ -6905,6 +6913,7 @@ static void ether_get_num_dma_chan_mtl_q(struct platform_device *pdev,
ret = of_device_is_compatible(np, "nvidia,nvmgbe"); ret = of_device_is_compatible(np, "nvidia,nvmgbe");
if (ret != 0) { if (ret != 0) {
*mac = OSI_MAC_HW_MGBE; *mac = OSI_MAC_HW_MGBE;
*mac_ver_type = MAC_CORE_VER_TYPE_MGBE;
max_chans = OSI_MGBE_T23X_MAX_NUM_CHANS; max_chans = OSI_MGBE_T23X_MAX_NUM_CHANS;
*macsec = OSI_MACSEC_T23X; *macsec = OSI_MACSEC_T23X;
} }
@@ -6912,6 +6921,7 @@ static void ether_get_num_dma_chan_mtl_q(struct platform_device *pdev,
ret = of_device_is_compatible(np, "nvidia,tegra234-eqos"); ret = of_device_is_compatible(np, "nvidia,tegra234-eqos");
if (ret != 0) { if (ret != 0) {
*mac = OSI_MAC_HW_EQOS; *mac = OSI_MAC_HW_EQOS;
*mac_ver_type = MAC_CORE_VER_TYPE_EQOS_5_30;
*macsec = OSI_MACSEC_T23X; *macsec = OSI_MACSEC_T23X;
max_chans = OSI_EQOS_MAX_NUM_CHANS; max_chans = OSI_EQOS_MAX_NUM_CHANS;
} }
@@ -6919,18 +6929,21 @@ static void ether_get_num_dma_chan_mtl_q(struct platform_device *pdev,
ret = of_device_is_compatible(np, "nvidia,tegra234-mgbe"); ret = of_device_is_compatible(np, "nvidia,tegra234-mgbe");
if (ret != 0) { if (ret != 0) {
*mac = OSI_MAC_HW_MGBE; *mac = OSI_MAC_HW_MGBE;
*mac_ver_type = MAC_CORE_VER_TYPE_MGBE;
max_chans = OSI_MGBE_T23X_MAX_NUM_CHANS; max_chans = OSI_MGBE_T23X_MAX_NUM_CHANS;
*macsec = OSI_MACSEC_T23X; *macsec = OSI_MACSEC_T23X;
} }
if (of_device_is_compatible(np, "nvidia,tegra264-mgbe")) { if (of_device_is_compatible(np, "nvidia,tegra264-mgbe")) {
*mac = OSI_MAC_HW_MGBE_T26X; *mac = OSI_MAC_HW_MGBE_T26X;
*mac_ver_type = MAC_CORE_VER_TYPE_MGBE;
*macsec = OSI_MACSEC_T26X; *macsec = OSI_MACSEC_T26X;
max_chans = OSI_MGBE_MAX_NUM_CHANS; max_chans = OSI_MGBE_MAX_NUM_CHANS;
} }
if (of_device_is_compatible(np, "nvidia,tegra264-eqos")) { if (of_device_is_compatible(np, "nvidia,tegra264-eqos")) {
*mac = OSI_MAC_HW_EQOS; *mac = OSI_MAC_HW_EQOS;
*mac_ver_type = MAC_CORE_VER_TYPE_EQOS_5_40;
*macsec = OSI_MACSEC_T26X; *macsec = OSI_MACSEC_T26X;
max_chans = OSI_EQOS_MAX_NUM_CHANS; max_chans = OSI_EQOS_MAX_NUM_CHANS;
} }
@@ -7168,7 +7181,7 @@ static void ether_init_rss(struct ether_priv_data *pdata,
static int ether_probe(struct platform_device *pdev) static int ether_probe(struct platform_device *pdev)
{ {
struct ether_priv_data *pdata; struct ether_priv_data *pdata;
unsigned int num_dma_chans, mac, macsec, num_mtl_queues, chan; unsigned int num_dma_chans, mac, macsec, num_mtl_queues, chan, mac_ver_type;
struct osi_core_priv_data *osi_core; struct osi_core_priv_data *osi_core;
struct osi_dma_priv_data *osi_dma; struct osi_dma_priv_data *osi_dma;
struct osi_ioctl *ioctl_data; struct osi_ioctl *ioctl_data;
@@ -7182,7 +7195,7 @@ static int ether_probe(struct platform_device *pdev)
}; };
ether_get_num_dma_chan_mtl_q(pdev, &num_dma_chans, ether_get_num_dma_chan_mtl_q(pdev, &num_dma_chans,
&mac, &macsec, &num_mtl_queues); &mac, &mac_ver_type, &macsec, &num_mtl_queues);
if (mac == OSI_MAC_HW_MGBE) { if (mac == OSI_MAC_HW_MGBE) {
ret = pinctrl_pm_select_default_state(&pdev->dev); ret = pinctrl_pm_select_default_state(&pdev->dev);
@@ -7236,6 +7249,7 @@ static int ether_probe(struct platform_device *pdev)
osi_dma->num_dma_chans = num_dma_chans; osi_dma->num_dma_chans = num_dma_chans;
osi_core->mac = mac; osi_core->mac = mac;
osi_core->mac_ver_type = mac_ver_type;
osi_core->macsec = macsec; osi_core->macsec = macsec;
osi_dma->mac = mac; osi_dma->mac = mac;
@@ -7748,6 +7762,7 @@ static const struct of_device_id ether_of_match[] = {
{ .compatible = "nvidia,tegra234-mgbe" }, { .compatible = "nvidia,tegra234-mgbe" },
{ .compatible = "nvidia,tegra234-eqos" }, { .compatible = "nvidia,tegra234-eqos" },
{ .compatible = "nvidia,tegra264-mgbe" }, { .compatible = "nvidia,tegra264-mgbe" },
{ .compatible = "nvidia,tegra264-eqos" },
{}, {},
}; };
MODULE_DEVICE_TABLE(of, ether_of_match); MODULE_DEVICE_TABLE(of, ether_of_match);

5
drivers/net/ethernet/nvidia/nvethernet/macsec.c
View File

@@ -325,8 +325,9 @@ static int macsec_get_platform_res(struct macsec_priv_data *macsec_pdata)
} }
/* Get clks */ /* Get clks */
if (pdata->osi_core->mac != OSI_MAC_HW_EQOS) { if ((pdata->osi_core->mac != OSI_MAC_HW_EQOS) ||
if (pdata->osi_core->mac_ver == OSI_MGBE_MAC_3_10) { (pdata->osi_core->mac_ver_type == MAC_CORE_VER_TYPE_EQOS_5_40)) {
if (pdata->osi_core->mac == OSI_MAC_HW_MGBE) {
macsec_pdata->macsec_clk = devm_clk_get(dev, "mgbe_macsec"); macsec_pdata->macsec_clk = devm_clk_get(dev, "mgbe_macsec");
} else { } else {
macsec_pdata->macsec_clk = devm_clk_get(dev, "macsec"); macsec_pdata->macsec_clk = devm_clk_get(dev, "macsec");

4
drivers/net/ethernet/nvidia/nvethernet/osd.c
View File

@@ -89,7 +89,7 @@ empty:
* *
* @param[in] usec: Delay number in micro seconds. * @param[in] usec: Delay number in micro seconds.
*/ */
static void osd_udelay(unsigned long usec) static void osd_udelay(unsigned long long usec)
{ {
udelay(usec); udelay(usec);
} }
@@ -102,7 +102,7 @@ static void osd_udelay(unsigned long usec)
* @param[in] umin: Minimum sleep required in micro seconds. * @param[in] umin: Minimum sleep required in micro seconds.
* @param[in] umax: Maximum sleep required in micro seconds. * @param[in] umax: Maximum sleep required in micro seconds.
*/ */
static void osd_usleep_range(unsigned long umin, unsigned long umax) static void osd_usleep_range(unsigned long long umin, unsigned long long umax)
{ {
usleep_range(umin, umax); usleep_range(umin, umax);
} }

50
drivers/net/ethernet/nvidia/nvethernet/sysfs.c
View File

@@ -2567,25 +2567,25 @@ static ssize_t macsec_irq_stats_show(struct device *dev,
struct osi_macsec_irq_stats *stats = &osi_core->macsec_irq_stats; struct osi_macsec_irq_stats *stats = &osi_core->macsec_irq_stats;
return scnprintf(buf, PAGE_SIZE, return scnprintf(buf, PAGE_SIZE,
"tx_dbg_capture_done:\t%lu\n" "tx_dbg_capture_done:\t%llu\n"
"tx_mtu_check_fail :\t%lu\n" "tx_mtu_check_fail :\t%llu\n"
"tx_mac_crc_error :\t%lu\n" "tx_mac_crc_error :\t%llu\n"
"tx_sc_an_not_valid :\t%lu\n" "tx_sc_an_not_valid :\t%llu\n"
"tx_aes_gcm_buf_ovf :\t%lu\n" "tx_aes_gcm_buf_ovf :\t%llu\n"
"tx_lkup_miss :\t%lu\n" "tx_lkup_miss :\t%llu\n"
"tx_uninit_key_slot :\t%lu\n" "tx_uninit_key_slot :\t%llu\n"
"tx_pn_threshold :\t%lu\n" "tx_pn_threshold :\t%llu\n"
"tx_pn_exhausted :\t%lu\n" "tx_pn_exhausted :\t%llu\n"
"rx_dbg_capture_done:\t%lu\n" "rx_dbg_capture_done:\t%llu\n"
"rx_icv_err_threshold :\t%lu\n" "rx_icv_err_threshold :\t%llu\n"
"rx_replay_error :\t%lu\n" "rx_replay_error :\t%llu\n"
"rx_mtu_check_fail :\t%lu\n" "rx_mtu_check_fail :\t%llu\n"
"rx_mac_crc_error :\t%lu\n" "rx_mac_crc_error :\t%llu\n"
"rx_aes_gcm_buf_ovf :\t%lu\n" "rx_aes_gcm_buf_ovf :\t%llu\n"
"rx_lkup_miss :\t%lu\n" "rx_lkup_miss :\t%llu\n"
"rx_uninit_key_slot :\t%lu\n" "rx_uninit_key_slot :\t%llu\n"
"rx_pn_exhausted :\t%lu\n" "rx_pn_exhausted :\t%llu\n"
"secure_reg_viol :\t%lu\n", "secure_reg_viol :\t%llu\n",
stats->tx_dbg_capture_done, stats->tx_dbg_capture_done,
stats->tx_mtu_check_fail, stats->tx_mtu_check_fail,
stats->tx_mac_crc_error, stats->tx_mac_crc_error,
@@ -2636,8 +2636,6 @@ static ssize_t ether_phy_iface_mode_show(struct device *dev,
struct osi_core_priv_data *osi_core = pdata->osi_core; struct osi_core_priv_data *osi_core = pdata->osi_core;
switch (osi_core->phy_iface_mode) { switch (osi_core->phy_iface_mode) {
case OSI_XAUI_MODE_25G:
return scnprintf(buf, PAGE_SIZE, "XAUI-25G\n");
case OSI_XFI_MODE_10G: case OSI_XFI_MODE_10G:
return scnprintf(buf, PAGE_SIZE, "XFI-10G\n"); return scnprintf(buf, PAGE_SIZE, "XFI-10G\n");
case OSI_XFI_MODE_5G: case OSI_XFI_MODE_5G:
@@ -2677,9 +2675,7 @@ static ssize_t ether_phy_iface_mode_store(struct device *dev,
return size; return size;
} }
if (strncmp(buf, "XAUI-25G", 7) == 0U) { if (strncmp(buf, "XFI-10G", 7) == 0U) {
osi_core->phy_iface_mode = OSI_XAUI_MODE_25G;
} else if (strncmp(buf, "XFI-10G", 7) == 0U) {
osi_core->phy_iface_mode = OSI_XFI_MODE_10G; osi_core->phy_iface_mode = OSI_XFI_MODE_10G;
} else if (strncmp(buf, "XFI-5G", 6) == 0U) { } else if (strncmp(buf, "XFI-5G", 6) == 0U) {
osi_core->phy_iface_mode = OSI_XFI_MODE_5G; osi_core->phy_iface_mode = OSI_XFI_MODE_5G;
@@ -2723,7 +2719,7 @@ static ssize_t ether_uphy_gbe_mode_show(struct device *dev,
struct osi_core_priv_data *osi_core = pdata->osi_core; struct osi_core_priv_data *osi_core = pdata->osi_core;
switch (osi_core->uphy_gbe_mode) { switch (osi_core->uphy_gbe_mode) {
case OSI_UPHY_GBE_MODE_25G: case OSI_GBE_MODE_25G:
return scnprintf(buf, PAGE_SIZE, "25G\n"); return scnprintf(buf, PAGE_SIZE, "25G\n");
case OSI_GBE_MODE_10G: case OSI_GBE_MODE_10G:
return scnprintf(buf, PAGE_SIZE, "10G\n"); return scnprintf(buf, PAGE_SIZE, "10G\n");
@@ -2764,7 +2760,7 @@ static ssize_t ether_uphy_gbe_mode_store(struct device *dev,
} }
if (strncmp(buf, "25G", 3) == 0U) { if (strncmp(buf, "25G", 3) == 0U) {
osi_core->uphy_gbe_mode = OSI_UPHY_GBE_MODE_25G; osi_core->uphy_gbe_mode = OSI_GBE_MODE_25G;
} else if (strncmp(buf, "10G", 3) == 0U) { } else if (strncmp(buf, "10G", 3) == 0U) {
osi_core->uphy_gbe_mode = OSI_GBE_MODE_10G; osi_core->uphy_gbe_mode = OSI_GBE_MODE_10G;
} else if (strncmp(buf, "5G", 2) == 0U) { } else if (strncmp(buf, "5G", 2) == 0U) {
@@ -2823,7 +2819,7 @@ static ssize_t ether_mac_frp_show(struct device *dev,
entry = &osi_core->frp_table[i]; entry = &osi_core->frp_table[i];
data = &entry->data; data = &entry->data;
j += scnprintf((buf + j), (PAGE_SIZE - j), j += scnprintf((buf + j), (PAGE_SIZE - j),
"[%d] ID:%d MD:0x%x ME:0x%x AF:%d RF:%d IM:%d NIC:%d FO:%d OKI:%d DCH:x%lx\n", "[%d] ID:%d MD:0x%x ME:0x%x AF:%d RF:%d IM:%d NIC:%d FO:%d OKI:%d DCH:x%llx\n",
i, entry->frp_id, data->match_data, i, entry->frp_id, data->match_data,
data->match_en, data->accept_frame, data->match_en, data->accept_frame,
data->reject_frame, data->inverse_match, data->reject_frame, data->inverse_match,