mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 09:11:26 +03:00
rtl8852ce: Add v126-10 to fix disconnect with new channel
Issue - When WiFi operating channel is switched, at times the wifi role index and role bitmap show that there is already a role assigned for the channel context and this causes a failure in association. Kernel warning is shown when this occurs. Fix - Update driver to v126-10 that fixes this issue. [ 57.590860] Call trace: [ 57.590861] rtw_phl_chanctx_add+0x528/0x8f4 [rtl8852ce] [ 57.590947] rtw_clear_is_accepted_status+0x4a4/0xbb8 [rtl8852ce] [ 57.591033] cur_req_hdl+0x3c/0x4c [rtl8852ce] [ 57.591118] msg_dispatch+0x2dc/0x3f8 [rtl8852ce] [ 57.591204] dispr_thread_loop_hdl+0x270/0x2dc [rtl8852ce] [ 57.591289] dispr_share_thread_loop_hdl+0x10/0x1c [rtl8852ce] [ 57.591374] share_thread_hdl+0xb8/0x1a0 [rtl8852ce] [ 57.591459] kthread+0x110/0x124 [ 57.591466] ret_from_fork+0x10/0x20 Bug 5440351 Bug 5442104 Change-Id: Ie78c70c1ea7a789351a2ba4ad445c4d0062281da Signed-off-by: Shobek Attupurath <sattupurath@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3426784 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
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@@ -14,9 +14,6 @@ EXTRA_CFLAGS += -Wno-unused-label
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#EXTRA_CFLAGS += -Wno-unused-function
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EXTRA_CFLAGS += -Wno-unused
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#EXTRA_CFLAGS += -Wno-uninitialized
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EXTRA_CFLAGS += -Wno-missing-prototypes
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EXTRA_CFLAGS += -Wno-missing-declarations
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EXTRA_CFLAGS += -Wno-enum-conversion
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############ ANDROID COMMON KERNEL ############
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# clang
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@@ -38,8 +35,7 @@ ifeq ($(GCC_VER_49),1)
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EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later
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endif
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SOURCETREE = $(srctree.nvidia-oot)/drivers/net/wireless/realtek/rtl8852ce
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EXTRA_CFLAGS += -I$(SOURCETREE)/include
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EXTRA_CFLAGS += -I$(src)/include
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EXTRA_LDFLAGS += --strip-debug
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@@ -165,8 +161,8 @@ endif
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CONFIG_RTW_DEBUG = y
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# default log level is _DRV_INFO_ = 4,
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# please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
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CONFIG_RTW_LOG_LEVEL = 0
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CONFIG_RTW_PHL_LOG_LEVEL = 0
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CONFIG_RTW_LOG_LEVEL = 4
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CONFIG_RTW_PHL_LOG_LEVEL = 3
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# CONFIG_RTW_APPEND_LOGLEVEL decide if append kernel log level to each messages.
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# default "n" for don't append.
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@@ -242,8 +238,7 @@ CONFIG_ROAMING_FLAG = 0x3f
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CONFIG_ROAM_SCAN_ORDER = 526
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###################### Platform Related #######################
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CONFIG_PLATFORM_TEGRA = y
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CONFIG_PLATFORM_I386_PC = n
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CONFIG_PLATFORM_I386_PC = y
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CONFIG_PLATFORM_RTL8198D = n
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CONFIG_PLATFORM_ANDROID_X86 = n
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CONFIG_PLATFORM_ANDROID_INTEL_X86 = n
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@@ -773,16 +768,6 @@ ifeq ($(CONFIG_DBG_AX_CAM), y)
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EXTRA_CFLAGS += -DCONFIG_DBG_AX_CAM
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endif
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ifeq ($(CONFIG_PLATFORM_TEGRA), y)
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ARCH = arm64
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KVER := $(shell uname -r)
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KSRC := /lib/modules/$(KVER)/build
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EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
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EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
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EXTRA_CFLAGS += -Wno-error=date-time
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MODULE_NAME = rtl8852ce
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endif
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ifeq ($(CONFIG_I386_BUILD_VERIFY), y)
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EXTRA_CFLAGS += -DCONFIG_I386_BUILD_VERIFY
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endif
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@@ -799,18 +784,8 @@ endif
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include $(wildcard $(DRV_PATH)/platform/*.mk)
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# Import platform specific compile options
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EXTRA_CFLAGS += -I$(SOURCETREE)/platform
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EXTRA_CFLAGS += -I$(src)/platform
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#_PLATFORM_FILES := platform/platform_ops.o
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ifeq ($(CONFIG_PCI_HCI), y)
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EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
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_PLATFORM_FILES := platform/platform_linux_pc_pci.o
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OBJS += $(_PLATFORM_FILES)
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# Core Config
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CONFIG_MSG_NUM = 128
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EXTRA_CFLAGS += -DCONFIG_MSG_NUM=$(CONFIG_MSG_NUM)
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#EXTRA_CFLAGS += -DCONFIG_TX_SKB_ORPHAN
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endif
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_PLATFORM_FILES += platform/platform_ops.o
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OBJS += $(_PLATFORM_FILES)
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########### CUSTOMER ################################
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@@ -830,7 +805,7 @@ endif
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ifneq ($(KERNELRELEASE),)
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########### COMMON #################################
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include $(SOURCETREE)/common.mk
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include $(src)/common.mk
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EXTRA_CFLAGS += -DPHL_PLATFORM_LINUX
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EXTRA_CFLAGS += -DCONFIG_PHL_ARCH
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@@ -851,10 +826,11 @@ ifeq ($(DIRTY_FOR_WORK), y)
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EXTRA_CFLAGS += -DDIRTY_FOR_WORK
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endif
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include $(SOURCETREE)/phl/phl.mk
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include $(src)/phl/phl.mk
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obj-m := $(MODULE_NAME).o
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obj-$(CONFIG_RTL8852CE) := $(MODULE_NAME).o
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obj-$(CONFIG_RTL8852CE) := $(MODULE_NAME).o
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$(MODULE_NAME)-y = $(OBJS)
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############# MEMORY MANAGMENT #############
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@@ -99,7 +99,7 @@ _CORE_FILES := core/rtw_fsm.o \
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_CORE_FILES += core/rtw_phl.o \
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core/rtw_phl_cmd.o
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EXTRA_CFLAGS += -I$(SOURCETREE)/core/crypto
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EXTRA_CFLAGS += -I$(src)/core/crypto
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_CORE_FILES += core/crypto/aes-internal.o \
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core/crypto/aes-internal-enc.o \
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core/crypto/aes-gcm.o \
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@@ -4542,9 +4542,6 @@ void stop_ap_mode(_adapter *padapter)
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rtw_warn_on(1);
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pmlmepriv->update_bcn = _FALSE;
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/*pmlmeext->bstart_bss = _FALSE;*/
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padapter->netif_up = _FALSE;
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/* _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); */
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/* reset and init security priv , this can refine with rtw_reset_securitypriv */
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_rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof(struct security_priv));
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@@ -7806,8 +7803,14 @@ bool rtw_add_del_sta_cmd_check(struct _ADAPTER *padapter, unsigned char *MacAddr
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if (padapter->ap_add_del_sta_cmd_state == ADD_DEL_STA_ST_IDLE) {
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status = rtw_ap_add_del_sta_cmd(padapter);
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if (status == RTW_PHL_STATUS_SUCCESS)
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if (status == RTW_PHL_STATUS_SUCCESS) {
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padapter->ap_add_del_sta_cmd_state = ADD_DEL_STA_ST_REQUESTING;
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} else {
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rtw_list_delete(&add_del_sta_obj->list);
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pstapriv->add_sta_list_cnt--;
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rtw_mfree(add_del_sta_obj, sizeof(struct rtw_add_del_sta_obj));
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add_del_sta_obj = NULL;
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}
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} else {
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RTW_INFO(FUNC_ADPT_FMT": reuse token\n", FUNC_ADPT_ARG(padapter));
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}
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@@ -177,8 +177,8 @@ sint _rtw_init_mlme_priv(_adapter *padapter)
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#else
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#define RTW_ROAM_SCAN_RESULT_EXP_MS (10*1000)
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#endif
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#define RTW_ROAM_SCAN_INTERVAL (2) /* 5*(2 second)*/
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#define RTW_ROAM_RSSI_THRESHOLD 45
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#define RTW_ROAM_SCAN_INTERVAL (5) /* 5*(2 second)*/
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#define RTW_ROAM_RSSI_THRESHOLD 30
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#define RTW_ROAM_RSSI_IDLE_TH RTW_ROAM_RSSI_THRESHOLD
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#define RTW_ROAM_RSSI_BUSY_TH RTW_ROAM_RSSI_THRESHOLD + 5
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@@ -7393,18 +7393,17 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc)
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#endif
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pattrib->last_txcmdsz = pattrib->pktlen;
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rtw_buf_update(&padapter->mlmepriv.assoc_req, &padapter->mlmepriv.assoc_req_len, (u8 *)pwlanhdr, pattrib->pktlen);
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#ifdef CONFIG_RTW_WNM
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if (is_reassoc == _TRUE)
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rtw_wnm_update_reassoc_req_ie(padapter);
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#endif
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dump_mgntframe(padapter, pmgntframe);
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ret = _SUCCESS;
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exit:
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if (ret == _SUCCESS) {
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rtw_buf_update(&padapter->mlmepriv.assoc_req, &padapter->mlmepriv.assoc_req_len, (u8 *)pwlanhdr, pattrib->pktlen);
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#ifdef CONFIG_RTW_WNM
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if (is_reassoc == _TRUE)
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rtw_wnm_update_reassoc_req_ie(padapter);
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#endif
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} else
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if (ret == _FAIL)
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rtw_buf_free(&padapter->mlmepriv.assoc_req, &padapter->mlmepriv.assoc_req_len);
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return;
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@@ -1783,12 +1783,6 @@ u8 _rtw_sitesurvey_condition_check(const char *caller, _adapter *adapter, bool c
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}
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#endif /* RTW_BUSY_DENY_SCAN */
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if (adapter_to_pwrctl(adapter)->bInSuspend == _TRUE) {
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RTW_INFO("%s bInSuspend scan abort!\n", __func__);
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ss_condition = SS_DENY_BLOCK_SCAN;
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goto _exit;
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}
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_exit:
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return ss_condition;
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}
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@@ -532,14 +532,18 @@ void rtw_tdls_process_ht_cap(_adapter *padapter, struct sta_info *ptdls_sta, PND
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/* AMPDU Parameters field */
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/* Get MIN of MAX AMPDU Length Exp */
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max_AMPDU_len = GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(pIE->data);
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max_AMPDU_len = rtw_min((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3), max_AMPDU_len);
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if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (*(pIE->data + 2) & 0x3))
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max_AMPDU_len = (*(pIE->data + 2) & 0x3);
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else
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max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3);
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/* Get MAX of MIN MPDU Start Spacing */
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min_MPDU_spacing = GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(pIE->data);
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min_MPDU_spacing = rtw_max((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c), min_MPDU_spacing);
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if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (*(pIE->data + 2) & 0x1c))
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min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c);
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else
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min_MPDU_spacing = (*(pIE->data + 2) & 0x1c);
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ptdls_sta->ampdu_priv.rx_ampdu_min_spacing = max_AMPDU_len | min_MPDU_spacing;
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/* Check if sta support s Short GI 20M */
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if ((phtpriv->sgi_20m == _TRUE) && (ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)))
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ptdls_sta->htpriv.sgi_20m = _TRUE;
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@@ -1027,17 +1027,29 @@ void HT_caps_handler(_adapter *padapter, struct _ADAPTER_LINK *padapter_link,
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pmlmeinfo->HT_caps_enable = 1;
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for (i = 0; i < (pIE->Length); i++)
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for (i = 0; i < (pIE->Length); i++) {
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if (i != 2) {
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/* Commented by Albert 2010/07/12 */
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/* Got the endian issue here. */
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pmlmeinfo->HT_caps.u.HT_cap[i] &= *(pIE->data + i);
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} else {
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/* AMPDU Parameters field */
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/* Get MIN of MAX AMPDU Length Exp */
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max_AMPDU_len = GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(pIE->data);
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max_AMPDU_len = rtw_min((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3), max_AMPDU_len);
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if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (*(pIE->data + i) & 0x3))
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max_AMPDU_len = (*(pIE->data + i) & 0x3);
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else
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max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3);
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/* Get MAX of MIN MPDU Start Spacing */
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min_MPDU_spacing = GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(pIE->data);
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min_MPDU_spacing = rtw_max((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c), min_MPDU_spacing);
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if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (*(pIE->data + i) & 0x1c))
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min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c);
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else
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min_MPDU_spacing = (*(pIE->data + i) & 0x1c);
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pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing;
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}
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}
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/* Commented by Albert 2010/07/12 */
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/* Have to handle the endian issue after copying. */
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@@ -1 +1 @@
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#define DRIVERVERSION "v1.19.16_nv-126-1-g1b567deb3.20250716_Certified_Module"
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#define DRIVERVERSION "v1.19.16_nv-126-10-g6784793e9.20250808_Certified_Module_beta"
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@@ -6841,7 +6841,7 @@ void rtw_cfg80211_external_auth_request(_adapter *padapter, union recv_frame *rf
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#if (KERNEL_VERSION(4, 17, 0) <= LINUX_VERSION_CODE) \
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|| defined(CONFIG_KERNEL_PATCH_EXTERNAL_AUTH)
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params.action = EXTERNAL_AUTH_START;
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params.action = NL80211_EXTERNAL_AUTH_START;
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_rtw_memcpy(params.bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
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params.ssid.ssid_len = pmlmeinfo->network.Ssid.SsidLength;
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_rtw_memcpy(params.ssid.ssid, pmlmeinfo->network.Ssid.Ssid,
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@@ -366,24 +366,18 @@ static irqreturn_t rtw_pci_interrupt(int irq, void *priv, struct pt_regs *regs)
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struct dvobj_priv *dvobj = (struct dvobj_priv *)priv;
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PPCI_DATA pci_data = dvobj_to_pci(dvobj);
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enum rtw_phl_status pstatus = RTW_PHL_STATUS_SUCCESS;
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unsigned long sp_flags;
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_adapter *padapter = dvobj_get_primary_adapter(dvobj);
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padapter->int_logs.all++;
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_rtw_spinlock_irq(&dvobj->phl_com->imr_lock, &sp_flags);
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if (rtw_phl_recognize_interrupt(dvobj->phl)) {
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padapter->int_logs.known++;
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pstatus = rtw_phl_interrupt_handler(dvobj->phl);
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}
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_rtw_spinunlock_irq(&dvobj->phl_com->imr_lock, &sp_flags);
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pstatus = rtw_phl_interrupt_request_handler(dvobj->phl);
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if (pstatus == RTW_PHL_STATUS_FAILURE) {
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padapter->int_logs.err++;
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return IRQ_HANDLED;
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}
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/* return IRQ_NONE; */
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padapter->int_logs.known++;
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return IRQ_HANDLED;
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/* return IRQ_NONE; */
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}
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#if defined(RTK_DMP_PLATFORM) || defined(CONFIG_PLATFORM_RTL8197D)
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@@ -1028,10 +1022,6 @@ static void rtw_dev_remove(struct pci_dev *pdev)
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dev_set_surprise_removed(dvobj);
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}
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#ifdef RTW_WKARD_PCI_DEVRM_DIS_INT
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rtw_phl_disable_interrupt(GET_PHL_INFO(dvobj));
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#endif
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#ifdef CONFIG_CSI_TIMER_POLLING
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rtw_csi_poll_timer_cancel(dvobj);
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#endif
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@@ -7,10 +7,10 @@
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ifeq ($(CONFIG_PHL_ARCH), y)
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phl_path := phl/$(HAL)
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phl_path_d1 := $(SOURCETREE)/phl/$(HAL)
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phl_path_d1 := $(src)/phl/$(HAL)
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else
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phl_path := $(HAL)
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phl_path_d1 := $(SOURCETREE)/$(HAL)
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phl_path_d1 := $(src)/$(HAL)
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endif
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# Base directory
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@@ -2,10 +2,10 @@
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ifeq ($(CONFIG_PHL_ARCH), y)
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phl_path := phl/
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phl_path_d1 := $(SOURCETREE)/phl/$(HAL)
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phl_path_d1 := $(src)/phl/$(HAL)
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else
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phl_path :=
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phl_path_d1 := $(SOURCETREE)/$(HAL)
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phl_path_d1 := $(src)/$(HAL)
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endif
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_HAL_FILES := $(phl_path)$(HAL)/hal_api_mac.o \
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@@ -60,7 +60,7 @@ void rtw_hal_clear_interrupt(void *h);
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void rtw_hal_restore_interrupt(struct rtw_phl_com_t *phl_com, void *h);
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u32 rtw_hal_interrupt_handler(void *h);
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void rtw_hal_restore_rx_interrupt(void *h);
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void rtw_hal_restore_rx_imr_mask(void *h);
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#ifdef PHL_RXSC_ISR
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u16 rtw_hal_rpq_isr_check(void *hal, u8 dma_ch);
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#endif
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@@ -401,7 +401,7 @@ void rtw_hal_restore_interrupt(struct rtw_phl_com_t *phl_com, void *h)
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hal_ops->restore_interrupt(hal);
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}
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void rtw_hal_restore_rx_interrupt(void *h)
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void rtw_hal_restore_rx_imr_mask(void *h)
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{
|
||||
struct hal_info_t *hal = (struct hal_info_t *)h;
|
||||
struct hal_ops_t *hal_ops = hal_get_ops(hal);
|
||||
|
||||
@@ -113,9 +113,6 @@ void rtw_hal_ser_int_cfg(void *hal, struct rtw_phl_com_t *phl_com,
|
||||
enum RTW_PHL_SER_CFG_STEP step)
|
||||
{
|
||||
struct hal_info_t *hal_info = (struct hal_info_t *)hal;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
struct hal_ops_t *hal_ops = hal_get_ops(hal_info);
|
||||
struct hal_spec_t *hal_spec = phl_get_ic_spec(phl_com);
|
||||
|
||||
@@ -129,13 +126,7 @@ void rtw_hal_ser_int_cfg(void *hal, struct rtw_phl_com_t *phl_com,
|
||||
* 1. disable imr
|
||||
* 2. set imr used during ser
|
||||
*/
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_com), false);
|
||||
#else
|
||||
if (hal_ops->disable_interrupt)
|
||||
hal_ops->disable_interrupt(hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
rtw_phl_disable_interrupt_sync(phl_com);
|
||||
if (hal_ops->init_int_default_value)
|
||||
hal_ops->init_int_default_value(hal, INT_SET_OPT_SER_START);
|
||||
break;
|
||||
@@ -143,12 +134,7 @@ void rtw_hal_ser_int_cfg(void *hal, struct rtw_phl_com_t *phl_com,
|
||||
/**
|
||||
* 1. enable interrupt
|
||||
*/
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_com), true);
|
||||
#else
|
||||
if (hal_ops->enable_interrupt)
|
||||
hal_ops->enable_interrupt(hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_com);
|
||||
break;
|
||||
case RTW_PHL_SER_M5_CFG:
|
||||
/**
|
||||
@@ -156,22 +142,11 @@ void rtw_hal_ser_int_cfg(void *hal, struct rtw_phl_com_t *phl_com,
|
||||
* 2. set imr used after ser
|
||||
* 3. enable interrupt
|
||||
*/
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_com), false);
|
||||
#else
|
||||
if (hal_ops->disable_interrupt)
|
||||
hal_ops->disable_interrupt(hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
rtw_phl_disable_interrupt_sync(phl_com);
|
||||
if (hal_ops->init_int_default_value)
|
||||
hal_ops->init_int_default_value(hal, INT_SET_OPT_SER_DONE);
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_com), true);
|
||||
#else
|
||||
if (hal_ops->enable_interrupt)
|
||||
hal_ops->enable_interrupt(hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_com);
|
||||
break;
|
||||
default:
|
||||
PHL_ERR("%s(): unknown step!\n", __func__);
|
||||
|
||||
@@ -7,10 +7,10 @@ HAL = hal_g6
|
||||
|
||||
ifeq ($(CONFIG_PHL_ARCH), y)
|
||||
phl_path := phl/hal_g6
|
||||
phl_path_d1 := $(SOURCETREE)/phl/$(HAL)
|
||||
phl_path_d1 := $(src)/phl/$(HAL)
|
||||
else
|
||||
phl_path := hal_g6
|
||||
phl_path_d1 := $(SOURCETREE)/$(HAL)
|
||||
phl_path_d1 := $(src)/$(HAL)
|
||||
endif
|
||||
|
||||
# Base directory
|
||||
|
||||
@@ -7,10 +7,10 @@
|
||||
|
||||
ifeq ($(CONFIG_PHL_ARCH), y)
|
||||
phl_path := phl/$(HAL)
|
||||
phl_path_d1 := $(SOURCETREE)/phl/$(HAL)
|
||||
phl_path_d1 := $(src)/phl/$(HAL)
|
||||
else
|
||||
phl_path := $(HAL)
|
||||
phl_path_d1 := $(SOURCETREE)/$(HAL)
|
||||
phl_path_d1 := $(src)/$(HAL)
|
||||
endif
|
||||
|
||||
# Base directory
|
||||
|
||||
@@ -7,10 +7,10 @@
|
||||
|
||||
ifeq ($(CONFIG_PHL_ARCH), y)
|
||||
phl_path := phl/$(HAL)
|
||||
phl_path_d1 := $(SOURCETREE)/phl/$(HAL)
|
||||
phl_path_d1 := $(src)/phl/$(HAL)
|
||||
else
|
||||
phl_path := $(HAL)
|
||||
phl_path_d1 := $(SOURCETREE)/$(HAL)
|
||||
phl_path_d1 := $(src)/$(HAL)
|
||||
endif
|
||||
|
||||
# Base directory
|
||||
|
||||
@@ -882,16 +882,6 @@ bool hal_recognize_int_8852ce(struct hal_info_t *hal)
|
||||
struct rtw_hal_com_t *hal_com = hal->hal_com;
|
||||
bool recognized = false;
|
||||
|
||||
#ifndef CONFIG_SYNC_INTERRUPT
|
||||
/**
|
||||
* We call hal_disable_int_isr_8852ce only instead of hal_disable_int_8852ce
|
||||
* which will only disable imr of indicator. Otherwise, if we disable imr
|
||||
* of wlan mac. ISR of indicator will be auto cleared due to imr & isr is '0'
|
||||
* in wlan mac.
|
||||
*/
|
||||
hal_disable_int_isr_8852ce(hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
/* check isr of indicator */
|
||||
if (hal_com->_intr_ind[0].en) {
|
||||
hal_com->_intr_ind[0].val = hal_read32(hal_com, R_AX_PCIE_HISR00_V1);
|
||||
@@ -902,13 +892,6 @@ bool hal_recognize_int_8852ce(struct hal_info_t *hal)
|
||||
hal_disable_int_rmn_8852ce(hal);
|
||||
} else {
|
||||
/* if isr is not recognized, go to end */
|
||||
#if 1
|
||||
PHL_WARN("%s: unknown isr\n", __func__);
|
||||
hal_com->_intr[0].val = 0;
|
||||
hal_com->_intr[1].val = 0;
|
||||
hal_com->_intr[2].val = 0;
|
||||
hal_com->_intr[3].val = 0;
|
||||
#endif
|
||||
goto end;
|
||||
}
|
||||
|
||||
@@ -962,13 +945,6 @@ bool hal_recognize_int_8852ce(struct hal_info_t *hal)
|
||||
}
|
||||
|
||||
end:
|
||||
#ifndef CONFIG_SYNC_INTERRUPT
|
||||
/* clear isr */
|
||||
hal_clear_int_8852ce(hal);
|
||||
/* restore imr */
|
||||
hal_restore_int_8852ce(hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
/*if (!recognized)
|
||||
HAL_DUMP_INT_8852CE(hal, true, true, true);*/
|
||||
|
||||
@@ -995,12 +971,6 @@ static u32 hal_rx_handler_8852ce(struct hal_info_t *hal, u32 *handled)
|
||||
/* disable rx related IMR, rx thread will restore them */
|
||||
hal_com->_intr[0].mask &= ~rx_handle_irq_imr;
|
||||
hal_com->_intr[3].mask &= ~rx_handle_irq_lps_imr;
|
||||
#ifndef CONFIG_SYNC_INTERRUPT
|
||||
if (hal_com->_intr[0].en)
|
||||
hal_write32(hal_com, R_AX_PCIE_HIMR00, hal_com->_intr[0].mask);
|
||||
if (hal_com->_intr[3].en)
|
||||
hal_write32(hal_com, R_AX_HIMR1, hal_com->_intr[3].mask);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
#ifdef PHL_RXSC_ISR
|
||||
hal_com->rx_int_array = handled0;
|
||||
#endif
|
||||
@@ -1037,12 +1007,6 @@ static u32 hal_rp_handler_8852ce(struct hal_info_t *hal, u32 *handled)
|
||||
/* disable rx related IMR, rx thread will restore them */
|
||||
hal_com->_intr[0].mask &= ~rp_handle_irq_imr;
|
||||
hal_com->_intr[3].mask &= ~rx_handle_irq_lps_imr;
|
||||
#ifndef CONFIG_SYNC_INTERRUPT
|
||||
if (hal_com->_intr[0].en)
|
||||
hal_write32(hal_com, R_AX_PCIE_HIMR00, hal_com->_intr[0].mask);
|
||||
if (hal_com->_intr[3].en)
|
||||
hal_write32(hal_com, R_AX_HIMR1, hal_com->_intr[3].mask);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
#ifdef PHL_RXSC_ISR
|
||||
hal_com->rx_int_array = handled0;
|
||||
#endif
|
||||
@@ -1159,25 +1123,10 @@ u32 hal_int_hdler_8852ce(struct hal_info_t *hal)
|
||||
void hal_rx_int_restore_8852ce(struct hal_info_t *hal)
|
||||
{
|
||||
struct rtw_hal_com_t *hal_com = hal->hal_com;
|
||||
#ifndef CONFIG_SYNC_INTERRUPT
|
||||
_os_spinlockfg sp_flags;
|
||||
|
||||
_os_spinlock(hal->phl_com->drv_priv, &hal->phl_com->imr_lock, _irq, &sp_flags);
|
||||
#endif
|
||||
|
||||
hal_com->_intr[0].mask |= (B_AX_RXDMA_INT_EN | B_AX_RPQDMA_INT_EN |
|
||||
B_AX_RDU_INT_EN | B_AX_RPQBD_FULL_INT_EN);
|
||||
hal_com->_intr[3].mask |= B_AX_GPIO18_INT_EN;
|
||||
#ifndef CONFIG_SYNC_INTERRUPT
|
||||
if (hal_com->_intr[0].en) {
|
||||
hal_write32(hal_com, R_AX_PCIE_HIMR00, hal_com->_intr[0].mask);
|
||||
}
|
||||
if (hal_com->_intr[3].en) {
|
||||
hal_write32(hal_com, R_AX_HIMR1, hal_com->_intr[3].mask);
|
||||
}
|
||||
_os_spinunlock(hal->phl_com->drv_priv, &hal->phl_com->imr_lock, _irq, &sp_flags);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
}
|
||||
|
||||
enum rtw_hal_status
|
||||
|
||||
@@ -2784,9 +2784,6 @@ static void _phl_rx_callback_pcie(void *context)
|
||||
struct phl_hci_trx_ops *hci_trx_ops = phl_info->hci_trx_ops;
|
||||
void *drvpriv = phl_to_drvpriv(phl_info);
|
||||
bool rx_pause = false;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
FUNCIN_WSTS(pstatus);
|
||||
|
||||
@@ -2813,10 +2810,8 @@ static void _phl_rx_callback_pcie(void *context)
|
||||
|
||||
end:
|
||||
/* restore int mask of rx */
|
||||
rtw_hal_restore_rx_interrupt(phl_info->hal);
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
ops->interrupt_restore(phl_to_drvpriv(phl_info), true);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_hal_restore_rx_imr_mask(phl_info->hal);
|
||||
phl_restore_interrupt_sync(phl_info->phl_com, true, true);
|
||||
|
||||
FUNCOUT_WSTS(pstatus);
|
||||
|
||||
|
||||
@@ -11,10 +11,10 @@ endif
|
||||
|
||||
ifeq ($(CONFIG_PHL_ARCH), y)
|
||||
phl_path := phl/
|
||||
phl_path_d1 := $(SOURCETREE)/phl/$(HAL)
|
||||
phl_path_d1 := $(src)/phl/$(HAL)
|
||||
else
|
||||
phl_path :=
|
||||
phl_path_d1 := $(SOURCETREE)/$(HAL)
|
||||
phl_path_d1 := $(src)/$(HAL)
|
||||
endif
|
||||
|
||||
_PHL_FILES := $(phl_path)phl_init.o \
|
||||
|
||||
@@ -39,6 +39,7 @@ void rtw_phl_disable_interrupt(void *phl);
|
||||
bool rtw_phl_recognize_interrupt(void *phl);
|
||||
void rtw_phl_clear_interrupt(void *phl);
|
||||
void rtw_phl_restore_interrupt(void *phl);
|
||||
enum rtw_phl_status rtw_phl_interrupt_request_handler(void *phl);
|
||||
|
||||
enum rtw_phl_status
|
||||
rtw_phl_cmd_cfg_hw_seq(void *phl,
|
||||
|
||||
@@ -260,8 +260,20 @@ void rtw_phl_enable_interrupt_sync(struct rtw_phl_com_t* phl_com)
|
||||
evt_ops->set_interrupt_caps(phl_com->drv_priv, true);
|
||||
#else
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl_com->phl_priv;
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
void *drv = phl_to_drvpriv(phl_info);
|
||||
struct hci_info_t *hci_info = (struct hci_info_t *)phl_info->hci;
|
||||
_os_spinlockfg sp_flags;
|
||||
|
||||
_os_spinlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
#endif
|
||||
|
||||
rtw_hal_enable_interrupt(phl_com, phl_info->hal);
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
hci_info->int_disabled = false;
|
||||
_os_spinunlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
#endif
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
}
|
||||
|
||||
@@ -273,12 +285,22 @@ void rtw_phl_disable_interrupt_sync(struct rtw_phl_com_t* phl_com)
|
||||
evt_ops->set_interrupt_caps(phl_com->drv_priv, false);
|
||||
#else
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl_com->phl_priv;
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
void *drv = phl_to_drvpriv(phl_info);
|
||||
struct hci_info_t *hci_info = (struct hci_info_t *)phl_info->hci;
|
||||
_os_spinlockfg sp_flags;
|
||||
|
||||
_os_spinlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
hci_info->int_disabled = true;
|
||||
#endif
|
||||
|
||||
rtw_hal_disable_interrupt(phl_com, phl_info->hal);
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
_os_spinunlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
#endif
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_PHL_FW_DUMP_EFUSE
|
||||
void rtw_phl_fw_dump_efuse_precfg(struct rtw_phl_com_t* phl_com)
|
||||
{
|
||||
|
||||
@@ -715,8 +715,8 @@ static void push_back_wait_req(struct cmd_dispatcher *obj,
|
||||
{
|
||||
void *d = phl_to_drvpriv(obj->phl_info);
|
||||
|
||||
pq_push(d, &(obj->token_req_wait_q), &(req->list), _tail, _bh);
|
||||
SET_STATUS_FLAG(req->status, REQ_STATUS_ENQ);
|
||||
pq_push(d, &(obj->token_req_wait_q), &(req->list), _tail, _bh);
|
||||
}
|
||||
|
||||
static void clear_wating_req(struct cmd_dispatcher *obj)
|
||||
|
||||
@@ -343,12 +343,12 @@ next_ch:
|
||||
goto next_ch;
|
||||
}
|
||||
else {
|
||||
PHL_INFO("%s: scan done\n", __func__);
|
||||
printk("%s: scan done\n", __func__);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
param->done_num = param->ch_num - sctrl->chlist.cnt;
|
||||
PHL_INFO("%s:[%d] idx=%d, r=%d, ch=%d, p=%d\n", __func__,
|
||||
printk("%s:[%d] idx=%d, r=%d, ch=%d, p=%d\n", __func__,
|
||||
band_idx, sctrl->ch_idx, sctrl->chlist.cnt, sctrl->scan_ch->channel,
|
||||
phl_get_passing_time_ms(param->start_time));
|
||||
|
||||
|
||||
@@ -26,15 +26,15 @@
|
||||
#define __PHL_GIT_INFO_H__
|
||||
/*@--------------------------[Define] ---------------------------------------*/
|
||||
|
||||
#define RTK_CORE_SHA1 "1b567deb317b6f9c4afa584602c34212ac1be727"
|
||||
#define RTK_PHL_SHA1 "cb718610a2b894e972b2c1179b4c24775480605e"
|
||||
#define RTK_CORE_SHA1 "6784793e97c8520c94a2fb213397e109827325ec"
|
||||
#define RTK_PHL_SHA1 "981191b0a91d583e48282299b55d86f768f4b98b"
|
||||
#define RTK_HALMAC_SHA1 "a8003e258e7ceec767c2e329732e7e3b63934473"
|
||||
#define RTK_HALBB_SHA1 "8f07cd65ef4ef6867255f3a95706e417c8d31bf3"
|
||||
#define RTK_HALRF_SHA1 "01c1864e02ade0c1d1482c85d6bb0fa0f4799651"
|
||||
#define RTK_BTC_SHA1 "33bcdb9f10f24aa8b92ee86a7076f89faf6ccbed"
|
||||
|
||||
#define RTK_CORE_TAGINFO "v1.19.16_nv-126-1-g1b567deb3"
|
||||
#define RTK_PHL_TAGINFO "PHL_1_19_111_0100-86-gcb718610a"
|
||||
#define RTK_CORE_TAGINFO "v1.19.16_nv-126-10-g6784793e9"
|
||||
#define RTK_PHL_TAGINFO "PHL_1_19_111_0100-94-g981191b0a"
|
||||
#define RTK_HALMAC_TAGINFO "HALMAC_0_29_95_0-1-ga8003e258e"
|
||||
#define RTK_HALBB_TAGINFO "HALBB_029_167_15-2-g8f07cd65"
|
||||
#define RTK_HALRF_TAGINFO "HALRF_029_00_161_HOTFIX_001-0-g01c1864e"
|
||||
|
||||
@@ -150,4 +150,5 @@
|
||||
#ifdef CONFIG_WIFI_7
|
||||
#endif
|
||||
|
||||
#include "phl_int.h"
|
||||
#endif /*_PHL_HEADERS_H_*/
|
||||
|
||||
@@ -428,6 +428,9 @@ static enum rtw_phl_status phl_hci_init(struct phl_info_t *phl_info,
|
||||
phl_status = RTW_PHL_STATUS_RESOURCE;
|
||||
goto error_hci_mem;
|
||||
}
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
_os_spinlock_init(phl_info->phl_com->drv_priv, &phl_info->hci->int_hdl_lock);
|
||||
#endif
|
||||
#ifdef CONFIG_USB_HCI
|
||||
phl_info->hci->usb_bulkout_size = ic_info->usb_info.usb_bulkout_size;
|
||||
#endif
|
||||
@@ -470,9 +473,13 @@ static void phl_hci_deinit(struct phl_info_t *phl_info, struct hci_info_t *hci)
|
||||
{
|
||||
|
||||
/* deinit variable or stop mechanism. */
|
||||
if (hci)
|
||||
if (hci) {
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
_os_spinlock_free(phl_info->phl_com->drv_priv, &hci->int_hdl_lock);
|
||||
#endif
|
||||
_os_mem_free(phl_to_drvpriv(phl_info), hci,
|
||||
sizeof(struct hci_info_t));
|
||||
}
|
||||
}
|
||||
|
||||
static enum rtw_phl_status _phl_hci_ops_check(struct phl_info_t *phl_info)
|
||||
@@ -1612,9 +1619,6 @@ enum rtw_phl_status rtw_phl_start(void *phl)
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl;
|
||||
enum rtw_phl_status phl_status = RTW_PHL_STATUS_FAILURE;
|
||||
enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
#ifdef CONFIG_POWER_SAVE
|
||||
struct rtw_ps_cap_t *ps_cap = _get_ps_sw_cap(phl_info);
|
||||
#endif
|
||||
@@ -1677,11 +1681,8 @@ enum rtw_phl_status rtw_phl_start(void *phl)
|
||||
/* NOT enable interrupt here to avoid system hang during WiFi up
|
||||
move interrupt enable to end of hw_iface init */
|
||||
#else
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), true);
|
||||
#else
|
||||
rtw_hal_enable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_info->phl_com);
|
||||
|
||||
#endif /* RTW_WKARD_98D_INTR_EN_TIMING */
|
||||
#ifdef CONFIG_POWER_SAVE
|
||||
}
|
||||
@@ -1717,21 +1718,9 @@ error_hal_start:
|
||||
|
||||
static void _phl_interrupt_stop(struct phl_info_t *phl_info)
|
||||
{
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
|
||||
do {
|
||||
if (false == TEST_STATUS_FLAG(phl_info->phl_com->dev_state,
|
||||
RTW_DEV_SURPRISE_REMOVAL))
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), false);
|
||||
} while (false);
|
||||
#else
|
||||
do {
|
||||
if (false == TEST_STATUS_FLAG(phl_info->phl_com->dev_state,
|
||||
RTW_DEV_SURPRISE_REMOVAL))
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
} while (false);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
}
|
||||
|
||||
static enum rtw_phl_status _phl_cmd_send_msg_phy_on(struct phl_info_t *phl_info)
|
||||
@@ -1809,9 +1798,7 @@ enum rtw_phl_status phl_wow_start(struct phl_info_t *phl_info, struct rtw_phl_st
|
||||
#ifdef CONFIG_WOWLAN
|
||||
enum rtw_phl_status pstatus = RTW_PHL_STATUS_FAILURE;
|
||||
struct phl_wow_info *wow_info = phl_to_wow_info(phl_info);
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
#ifdef DBG_MONITOR_TIME
|
||||
u32 start_t = 0;
|
||||
|
||||
@@ -1884,11 +1871,7 @@ enum rtw_phl_status phl_wow_start(struct phl_info_t *phl_info, struct rtw_phl_st
|
||||
|
||||
end:
|
||||
if (RTW_PHL_STATUS_SUCCESS != pstatus) {
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
phl_role_suspend(phl_info, PHL_ROLE_SUSPEND_RSN_DEV_SUSP);
|
||||
phl_datapath_stop_sw(phl_info, PHL_MDL_PHY_MGNT);
|
||||
phl_datapath_stop_hw(phl_info);
|
||||
@@ -1916,17 +1899,10 @@ end:
|
||||
static void _wow_stop_reinit(struct phl_info_t *phl_info)
|
||||
{
|
||||
enum rtw_phl_status pstatus = RTW_PHL_STATUS_FAILURE;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
PHL_WARN("%s : reset hw!\n", __func__);
|
||||
phl_role_suspend(phl_info, PHL_ROLE_SUSPEND_RSN_DEV_SUSP);
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
phl_module_stop(phl_info);
|
||||
phl_datapath_stop_sw(phl_info, PHL_MDL_PHY_MGNT);
|
||||
phl_datapath_stop_hw(phl_info);
|
||||
@@ -2039,9 +2015,6 @@ enum rtw_phl_status rtw_phl_rf_on(void *phl)
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl;
|
||||
enum rtw_phl_status phl_status = RTW_PHL_STATUS_FAILURE;
|
||||
enum rtw_hal_status hal_status = RTW_HAL_STATUS_SUCCESS;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
PHL_INFO("%s\n", __func__);
|
||||
|
||||
@@ -2065,11 +2038,7 @@ enum rtw_phl_status rtw_phl_rf_on(void *phl)
|
||||
phl_datapath_start_hw(phl_info);
|
||||
phl_datapath_start_sw(phl_info, PHL_MDL_POWER_MGNT);
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), true);
|
||||
#else
|
||||
rtw_hal_enable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_info->phl_com);
|
||||
|
||||
phl_role_recover(phl_info);
|
||||
|
||||
@@ -2082,19 +2051,11 @@ error_hal_start:
|
||||
enum rtw_phl_status rtw_phl_rf_off(void *phl)
|
||||
{
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
PHL_INFO("%s\n", __func__);
|
||||
|
||||
phl_role_suspend(phl_info, PHL_ROLE_SUSPEND_RSN_RF_OFF);
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
|
||||
phl_datapath_stop_sw(phl_info, PHL_MDL_POWER_MGNT);
|
||||
phl_datapath_stop_hw(phl_info);
|
||||
@@ -2219,14 +2180,8 @@ enum rtw_phl_status rtw_phl_pnp_stop(void *phl)
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
struct phl_hci_trx_ops *trx_ops = phl_info->hci_trx_ops;
|
||||
#endif
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *ops = &phl_info->phl_com->evt_ops;
|
||||
|
||||
ops->set_interrupt_caps(phl_to_drvpriv(phl_info), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
rtw_hal_cfg_txhci(phl_info->hal, false);
|
||||
rtw_hal_cfg_rxhci(phl_info->hal, false);
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
@@ -2489,6 +2444,7 @@ void rtw_phl_write_rfreg(void *phl,
|
||||
void rtw_phl_restore_interrupt(void *phl)
|
||||
{
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl;
|
||||
|
||||
rtw_hal_restore_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
}
|
||||
|
||||
@@ -2513,9 +2469,6 @@ enum rtw_phl_status rtw_phl_interrupt_handler(void *phl)
|
||||
enum rtw_phl_status phl_status = RTW_PHL_STATUS_SUCCESS;
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl;
|
||||
u32 int_hdler_msk = 0x0;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
struct gtimer_ctx *gt_ctx = (struct gtimer_ctx *)&phl_info->gt3_ctx;
|
||||
u8 skip_tx = 0;
|
||||
|
||||
@@ -2593,9 +2546,8 @@ enum rtw_phl_status rtw_phl_interrupt_handler(void *phl)
|
||||
|
||||
end:
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
ops->interrupt_restore(phl_to_drvpriv(phl_info), false);
|
||||
#endif
|
||||
phl_restore_interrupt_sync(phl_info->phl_com, false, false);
|
||||
|
||||
return phl_status;
|
||||
}
|
||||
|
||||
@@ -2631,6 +2583,33 @@ void rtw_phl_clear_interrupt(void *phl)
|
||||
rtw_hal_clear_interrupt(phl_info->hal);
|
||||
}
|
||||
|
||||
enum rtw_phl_status rtw_phl_interrupt_request_handler(void *phl)
|
||||
{
|
||||
enum rtw_phl_status psts = RTW_PHL_STATUS_FAILURE;
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl;
|
||||
void *drv = phl_to_drvpriv(phl_info);
|
||||
struct hci_info_t *hci_info = (struct hci_info_t *)phl_info->hci;
|
||||
_os_spinlockfg sp_flags;
|
||||
|
||||
_os_spinlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
if (hci_info->int_disabled == true)
|
||||
PHL_ERR("%s int_disabled ...\n", __func__);
|
||||
|
||||
rtw_phl_disable_interrupt_isr(phl_info);/* Disable Layer 1 IMR */
|
||||
if (rtw_phl_recognize_interrupt(phl_info)) {
|
||||
rtw_phl_clear_interrupt(phl_info);/* clear isr when recognized */
|
||||
psts = rtw_phl_interrupt_handler(phl_info);
|
||||
} else {
|
||||
rtw_phl_restore_interrupt(phl_info);
|
||||
psts = RTW_PHL_STATUS_SUCCESS;
|
||||
}
|
||||
_os_spinunlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
#endif
|
||||
return psts;
|
||||
}
|
||||
|
||||
enum rtw_phl_status rtw_phl_msg_hub_register_recver(void* phl,
|
||||
struct phl_msg_receiver* ctx, enum phl_msg_recver_layer layer)
|
||||
{
|
||||
|
||||
47
drivers/net/wireless/realtek/rtl8852ce/phl/phl_int.h
Normal file
47
drivers/net/wireless/realtek/rtl8852ce/phl/phl_int.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2024 Realtek Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*****************************************************************************/
|
||||
#ifndef _PHL_INT_H_
|
||||
#define _PHL_INT_H_
|
||||
|
||||
void rtw_phl_enable_interrupt_sync(struct rtw_phl_com_t* phl_com);
|
||||
void rtw_phl_disable_interrupt_sync(struct rtw_phl_com_t* phl_com);
|
||||
|
||||
static inline void phl_restore_interrupt_sync(struct rtw_phl_com_t* phl_com, bool wlock, bool rx)
|
||||
{
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_com->evt_ops;
|
||||
|
||||
evt_ops->interrupt_restore(phl_com->drv_priv, rx);
|
||||
#else
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
struct phl_info_t *phl_info = (struct phl_info_t *)phl_com->phl_priv;
|
||||
|
||||
if (wlock) {
|
||||
void *drv = phl_to_drvpriv(phl_info);
|
||||
struct hci_info_t *hci_info = (struct hci_info_t *)phl_info->hci;
|
||||
_os_spinlockfg sp_flags;
|
||||
|
||||
_os_spinlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
if (hci_info->int_disabled == false)
|
||||
rtw_hal_restore_interrupt(phl_com, phl_info->hal);
|
||||
_os_spinunlock(drv, &hci_info->int_hdl_lock, _irq, &sp_flags);
|
||||
} else {
|
||||
rtw_hal_restore_interrupt(phl_com, phl_info->hal);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /*_PHL_INT_H_*/
|
||||
@@ -2951,6 +2951,12 @@ phl_mr_chandef_sync(struct phl_info_t *phl_info, struct hw_band_ctl_t *band_ctrl
|
||||
if (rlink->hw_band == band_ctrl->id)
|
||||
break;
|
||||
}
|
||||
|
||||
if (rlink == NULL) {
|
||||
PHL_ERR("ridx :%d rlink == NULL\n", ridx);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (role_num == 0) {
|
||||
band_ret = rlink->chandef.band;
|
||||
ch_ret = rlink->chandef.chan;
|
||||
|
||||
@@ -221,11 +221,7 @@ _ps_ps_cfg_int(struct phl_info_t *phl_info, u8 ps_mode, enum phl_ps_ps_int_cfg_s
|
||||
* 1. disable imr
|
||||
* 2. stop datapath
|
||||
*/
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_info->phl_com), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
|
||||
_phl_ps_ctrl_datapath(phl_info, true);
|
||||
break;
|
||||
@@ -240,22 +236,14 @@ _ps_ps_cfg_int(struct phl_info_t *phl_info, u8 ps_mode, enum phl_ps_ps_int_cfg_s
|
||||
if (ps_mode == PS_MODE_LPS)
|
||||
_phl_ps_ctrl_datapath(phl_info, false);
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_info->phl_com), true);
|
||||
#else
|
||||
rtw_hal_enable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_info->phl_com);
|
||||
break;
|
||||
case PS_LEAVE_CFG_INT_PRE_PHASE:
|
||||
/**
|
||||
* 1. disable imr
|
||||
* 2. stop datapath
|
||||
*/
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_info->phl_com), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
|
||||
if (ps_mode == PS_MODE_LPS)
|
||||
_phl_ps_ctrl_datapath(phl_info, true);
|
||||
@@ -270,11 +258,7 @@ _ps_ps_cfg_int(struct phl_info_t *phl_info, u8 ps_mode, enum phl_ps_ps_int_cfg_s
|
||||
|
||||
_phl_ps_ctrl_datapath(phl_info, false);
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_info->phl_com), true);
|
||||
#else
|
||||
rtw_hal_enable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_info->phl_com);
|
||||
break;
|
||||
default:
|
||||
PHL_ERR("%s(): unknown step!\n", __func__);
|
||||
|
||||
@@ -33,9 +33,12 @@ struct hci_info_t {
|
||||
#endif
|
||||
void *wd_dma_pool;
|
||||
void *h2c_dma_pool;
|
||||
_os_lock int_hdl_lock;
|
||||
bool int_disabled;
|
||||
#elif defined(CONFIG_USB_HCI)
|
||||
u16 usb_bulkout_size;
|
||||
bool usb_in_rx_start;
|
||||
|
||||
#elif defined(CONFIG_SDIO_HCI)
|
||||
u32 tx_drop_cnt; /* bit31 means overflow or not */
|
||||
#ifdef SDIO_TX_THREAD
|
||||
@@ -49,7 +52,6 @@ struct hci_info_t {
|
||||
#endif /* CONFIG_PHL_SDIO_TX_CB_THREAD */
|
||||
#endif /* SDIO_TX_THREAD */
|
||||
#endif
|
||||
|
||||
u8 *wd_ring;
|
||||
u8 *txbuf_pool;
|
||||
u8 *rxbuf_pool;
|
||||
|
||||
@@ -1216,16 +1216,9 @@ enum rtw_phl_status phl_wow_init_postcfg(struct phl_wow_info *wow_info)
|
||||
struct phl_info_t *phl_info = wow_info->phl_info;
|
||||
struct phl_hci_trx_ops *trx_ops = phl_info->hci_trx_ops;
|
||||
struct rtw_phl_stainfo_t *sta = wow_info->sta;
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
/* disable interrupt */
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phl_to_drvpriv(phl_info), false);
|
||||
#else
|
||||
rtw_hal_disable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_disable_interrupt_sync(phl_info->phl_com);
|
||||
|
||||
_wow_stop_datapath(phl_info, PHL_CTRL_RX);
|
||||
|
||||
@@ -1251,17 +1244,8 @@ enum rtw_phl_status phl_wow_init_postcfg(struct phl_wow_info *wow_info)
|
||||
|
||||
static void _wow_initialize_interrupt(struct phl_info_t *phl_info)
|
||||
{
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
struct rtw_phl_evt_ops *evt_ops = &phl_info->phl_com->evt_ops;
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
|
||||
rtw_hal_init_int_default_value(phl_info->phl_com, phl_info->hal, INT_SET_OPT_HAL_INIT);
|
||||
|
||||
#ifdef CONFIG_SYNC_INTERRUPT
|
||||
evt_ops->set_interrupt_caps(phlcom_to_drvpriv(phl_info->phl_com), true);
|
||||
#else
|
||||
rtw_hal_enable_interrupt(phl_info->phl_com, phl_info->hal);
|
||||
#endif /* CONFIG_SYNC_INTERRUPT */
|
||||
rtw_phl_enable_interrupt_sync(phl_info->phl_com);
|
||||
}
|
||||
|
||||
enum rtw_phl_status phl_wow_init(struct phl_wow_info *wow_info)
|
||||
|
||||
Reference in New Issue
Block a user