From ce5e1eadbbfdf3d8177c456dd927c02c87c5c0cc Mon Sep 17 00:00:00 2001 From: Amruta Bhamidipati Date: Wed, 12 Jul 2023 20:29:53 +0000 Subject: [PATCH] drivers: pva: Update DMA desc patching When BL format is used, address-bit 39 needs to be set only for T23x and older generations to indicate XBAR_RAW swizzling is required. Bug 4190882 Change-Id: I51805c9636bae8d3dec83b02e0665a4eb9657406 Signed-off-by: Amruta Bhamidipati Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2935382 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2999151 Reviewed-by: Krish Agarwal Reviewed-by: Michael Chen (SW-TEGRA) Reviewed-by: Omar Nemri Tested-by: Omar Nemri GVS: Gerrit_Virtual_Submit --- drivers/video/tegra/host/pva/pva_dma.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/video/tegra/host/pva/pva_dma.c b/drivers/video/tegra/host/pva/pva_dma.c index 32e87c40..00ad4028 100644 --- a/drivers/video/tegra/host/pva/pva_dma.c +++ b/drivers/video/tegra/host/pva/pva_dma.c @@ -272,6 +272,7 @@ patch_dma_desc_address(struct pva_submit_task *task, int32_t err = 0; uint64_t addr_base = 0; struct pva_dma_task_buffer_info_s *buff_info = &task->task_buff_info[desc_id]; + int hwgen = task->pva->version; nvpva_dbg_fn(task->pva, ""); @@ -410,9 +411,12 @@ patch_dma_desc_address(struct pva_submit_task *task, task->src_surf_base_addr = addr_base; buff_info->src_buffer_size = mem->size; - /** If BL format selected, set addr bit 39 to indicate */ - /* XBAR_RAW swizzling is required */ - addr_base |= (u64)umd_dma_desc->srcFormat << 39U; + /* If BL format selected, set addr bit 39 to indicate + * XBAR_RAW swizzling is required for PVA_HW_GEN2 and + * older generations. + */ + if (hwgen <= PVA_HW_GEN2) + addr_base |= (u64)umd_dma_desc->srcFormat << 39U; break; } @@ -594,9 +598,13 @@ patch_dma_desc_address(struct pva_submit_task *task, task->dst_surf_base_addr = addr_base; buff_info->dst_buffer_size = mem->size; - /* If BL format selected, set addr bit 39 to indicate */ - /* XBAR_RAW swizzling is required */ - addr_base |= (u64)umd_dma_desc->dstFormat << 39U; + /* If BL format selected, set addr bit 39 to indicate + * XBAR_RAW swizzling is required for PVA_HW_GEN2 + * and older generations. + */ + if (hwgen <= PVA_HW_GEN2) + addr_base |= (u64)umd_dma_desc->dstFormat << 39U; + break; } case DMA_DESC_DST_XFER_R5TCM: