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ASoC: tegra: Fix build for Linux v6.15

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In Linux v6.15, the SOC_SINGLE_VALUE macro was updated and an 'xmin'
parameter was added. Add a conftest test to check for this and update
the Tegra ARAD driver accordingly.

JIRA LINQPJ14-47

Change-Id: I597104327dac9108a7ab106f0c3fec575947626d
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328425
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
This commit is contained in:
Jon Hunter
2025-03-25 13:48:46 +00:00
parent 04e5d3eac8
commit cf368bfa2b
3 changed files with 33 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
scripts/conftest/Makefile
View File

@@ -205,6 +205,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += snd_soc_dai_struct_has_symmetric_prefix
NV_CONFTEST_FUNCTION_COMPILE_TESTS += snd_soc_of_get_dai_name_has_index_arg
NV_CONFTEST_FUNCTION_COMPILE_TESTS += snd_soc_rtd_to_codec
NV_CONFTEST_FUNCTION_COMPILE_TESTS += simple_util_dai_init
NV_CONFTEST_FUNCTION_COMPILE_TESTS += soc_single_value_has_xmin_arg
NV_CONFTEST_FUNCTION_COMPILE_TESTS += spi_driver_struct_remove_return_type_int
NV_CONFTEST_FUNCTION_COMPILE_TESTS += spi_get_chipselect
NV_CONFTEST_FUNCTION_COMPILE_TESTS += tc_taprio_qopt_offload_struct_has_cmd

19
scripts/conftest/conftest.sh
View File

@@ -8386,6 +8386,25 @@ compile_test() {
compile_check_conftest "$CODE" "NV_ASOC_SIMPLE_RENAMED_SIMPLE" "" "functions"
;;
soc_single_value_has_xmin_arg)
#
# Determine if SOC_SINGLE_VALUE macro has xmin arg
#
# Commit 6db630902727 ("ASoC: Tidy up SOC_DOUBLE_* and SOC_SINGLE_*
# helpers") added an 'xmin' argument to the SOC_SINGLE_VALUE macro
# in Linux v6.15.
#
CODE="
#include <sound/soc.h>
void conftest_soc_single_value_has_xmin_arg(void)
{
int value = SOC_SINGLE_VALUE(0, 0, 0, 0, 0, 0);
}
"
compile_check_conftest "$CODE" "NV_SOC_SINGLE_VALUE_HAS_XMIN_ARG" "" "types"
;;
spi_driver_struct_remove_return_type_int)
#
# Determine if return type of .remove function of struct spi_driver is int or void.

20
sound/soc/tegra/tegra186_arad.c
View File

@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
// SPDX-FileCopyrightText: Copyright (c) 2015-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
//
// tegra186_arad.c - Tegra186 ARAD driver
@@ -431,15 +431,21 @@ static ARAD_MUX_ENUM_CTRL_DECL(denominator6,
0, 0xffff, 0, tegra186_arad_get_prescalar, \
tegra186_arad_put_prescalar)
#if defined(NV_SOC_SINGLE_VALUE_HAS_XMIN_ARG) /* Linux v6.15 */
#define ARAD_SINGLE_VALUE(xreg, xmax) SOC_SINGLE_VALUE(xreg, 0, 0, xmax, 0, 0)
#else
#define ARAD_SINGLE_VALUE(xreg, xmax) SOC_SINGLE_VALUE(xreg, 0, xmax, 0, 0)
#endif
#define ARAD_LINE_RATIO_INT(id) { \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
.name = "Lane"#id" Ratio Int", \
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
.info = tegra186_arad_get_info, \
.get = tegra186_arad_get_ratio_int, \
.private_value = SOC_SINGLE_VALUE( \
TEGRA186_ARAD_LANE##id##_RATIO_INTEGER_PART, 0, \
TEGRA186_ARAD_LANE_RATIO_INTEGER_PART_MASK, 0, 0) }
.private_value = ARAD_SINGLE_VALUE( \
TEGRA186_ARAD_LANE##id##_RATIO_INTEGER_PART, \
TEGRA186_ARAD_LANE_RATIO_INTEGER_PART_MASK) }
#define ARAD_LINE_RATIO_FRAC(id) { \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,\
@@ -447,9 +453,9 @@ static ARAD_MUX_ENUM_CTRL_DECL(denominator6,
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,\
.info = tegra186_arad_get_info, \
.get = tegra186_arad_get_ratio_frac,\
.private_value = SOC_SINGLE_VALUE(\
TEGRA186_ARAD_LANE##id##_RATIO_FRACTIONAL_PART, 0, \
TEGRA186_ARAD_LANE_RATIO_FRAC_PART_MASK, 0, 0) }
.private_value = ARAD_SINGLE_VALUE(\
TEGRA186_ARAD_LANE##id##_RATIO_FRACTIONAL_PART, \
TEGRA186_ARAD_LANE_RATIO_FRAC_PART_MASK) }
static const struct snd_kcontrol_new tegra186_arad_controls[] = {
SOC_SINGLE_EXT("Lane1 enable", TEGRA186_ARAD_LANE_ENABLE, 0, 1, 0,