From d2a5a35cfe261edf2d8a34dfdf000c27528f31b4 Mon Sep 17 00:00:00 2001 From: lchiu Date: Thu, 2 May 2024 09:08:50 +0000 Subject: [PATCH] vse: support 64 bit keyslot for tsec Bug 4620571 Change-Id: Iea2f42167245308348a0a50e9fde14036c3f0736 Signed-off-by: lchiu Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3130036 (cherry picked from commit ba8f79f3e14b755ebb99464de2ff8d1c2d173e24) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3140529 Tested-by: mobile promotions Reviewed-by: mobile promotions --- drivers/crypto/tegra-hv-vse-safety.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/tegra-hv-vse-safety.c b/drivers/crypto/tegra-hv-vse-safety.c index 8153d9ee..90e992cb 100644 --- a/drivers/crypto/tegra-hv-vse-safety.c +++ b/drivers/crypto/tegra-hv-vse-safety.c @@ -457,7 +457,7 @@ struct tegra_virtual_tsec_args { /** * Keyslot index for keyslot containing TSEC key */ - uint32_t keyslot; + uint64_t keyslot; /** * Size of input buffer in bytes. @@ -2253,7 +2253,7 @@ static int tegra_hv_vse_safety_tsec_sv_op(struct ahash_request *req) ivc_tx->tsec.src_addr = src_buf_addr; ivc_tx->tsec.src_buf_size = req->nbytes; - ivc_tx->tsec.keyslot = *((uint32_t *)cmac_ctx->aes_keyslot); + ivc_tx->tsec.keyslot = *((uint64_t *)cmac_ctx->aes_keyslot); if (cmac_req_data->request_type == CMAC_SIGN) { ivc_tx->cmd = TEGRA_VIRTUAL_SE_CMD_TSEC_SIGN;