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tegra-alt: asrc: request ratio packet from arad

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If ARAD lane gets locked before ASRC is enabled
the ASRC misses the ratio packet from ARAD and does
not lock. Requesting ratio packet again from ARAD
enables ASRC to lock in such cases.

Bug 200158741

Change-Id: I63841b46eec832f3f16be9fc78fa51d723d9e825
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
(cherry-picked from commit 88eac6a1ffa5452c170756c1266eae388795689d)
Reviewed-on: http://git-master/r/842381
Tested-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
This commit is contained in:
Gaurav Tendolkar
2015-12-07 19:58:43 +05:30
committed by Sameer Pujar
parent 829c39db5c
commit d451956f83
2 changed files with 59 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
sound/soc/tegra-alt/tegra186_arad_alt.c
View File

@@ -1,7 +1,7 @@
/* /*
* tegra186_arad_alt.c - Tegra186 ARAD driver * tegra186_arad_alt.c - Tegra186 ARAD driver
* *
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -39,6 +39,8 @@
#define DRV_NAME "tegra186-arad" #define DRV_NAME "tegra186-arad"
static struct device *arad_dev;
#define ARAD_LANE_NUMERATOR_MUX(id) \ #define ARAD_LANE_NUMERATOR_MUX(id) \
(TEGRA186_ARAD_LANE1_NUMERATOR_MUX_SEL + id*TEGRA186_ARAD_LANE_STRIDE) (TEGRA186_ARAD_LANE1_NUMERATOR_MUX_SEL + id*TEGRA186_ARAD_LANE_STRIDE)
#define ARAD_LANE_DENOMINATOR_MUX(id) \ #define ARAD_LANE_DENOMINATOR_MUX(id) \
@@ -555,6 +557,17 @@ static const struct snd_kcontrol_new tegra186_arad_controls[] = {
ARAD_DENOMINATOR_PRESCALAR(6), ARAD_DENOMINATOR_PRESCALAR(6),
}; };
void tegra186_arad_send_ratio(void)
{
struct tegra186_arad *arad = dev_get_drvdata(arad_dev);
if (!arad)
return;
pm_runtime_get_sync(arad_dev);
regmap_write(arad->regmap, TEGRA186_ARAD_SEND_RATIO, 0x1);
pm_runtime_put(arad_dev);
}
static struct snd_soc_codec_driver tegra186_arad_codec = { static struct snd_soc_codec_driver tegra186_arad_codec = {
.probe = tegra186_arad_codec_probe, .probe = tegra186_arad_codec_probe,
.dapm_widgets = tegra186_arad_widgets, .dapm_widgets = tegra186_arad_widgets,
@@ -800,6 +813,7 @@ static int tegra186_arad_platform_probe(struct platform_device *pdev)
ret = -ENOMEM; ret = -ENOMEM;
goto err; goto err;
} }
arad_dev = &pdev->dev;
arad->soc_data = soc_data; arad->soc_data = soc_data;

57
sound/soc/tegra-alt/tegra186_asrc_alt.c
View File

@@ -1,7 +1,7 @@
/* /*
* tegra186_asrc_alt.c - Tegra186 ASRC driver * tegra186_asrc_alt.c - Tegra186 ASRC driver
* *
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -35,6 +35,7 @@
#include "tegra210_xbar_alt.h" #include "tegra210_xbar_alt.h"
#include "tegra186_asrc_alt.h" #include "tegra186_asrc_alt.h"
#include "tegra186_arad_alt.h"
#define DRV_NAME "tegra186-asrc" #define DRV_NAME "tegra186-asrc"
#define ASRC_ARAM_START_ADDR 0x3F800000 #define ASRC_ARAM_START_ADDR 0x3F800000
@@ -473,6 +474,24 @@ static int tegra186_asrc_put_ratio_frac(struct snd_kcontrol *kcontrol,
return 0; return 0;
} }
static int tegra186_asrc_req_arad_ratio(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
struct device *dev = codec->dev;
struct tegra186_asrc *asrc = dev_get_drvdata(dev);
int ret = 0;
unsigned int lane_id = 0;
lane_id = (w->reg - TEGRA186_ASRC_STREAM1_ENABLE) /
TEGRA186_ASRC_STREAM_STRIDE;
if (asrc->lane[lane_id].ratio_source == RATIO_ARAD)
tegra186_arad_send_ratio();
return ret;
}
static int tegra186_asrc_codec_probe(struct snd_soc_codec *codec) static int tegra186_asrc_codec_probe(struct snd_soc_codec *codec)
{ {
struct tegra186_asrc *asrc = snd_soc_codec_get_drvdata(codec); struct tegra186_asrc *asrc = snd_soc_codec_get_drvdata(codec);
@@ -556,18 +575,30 @@ static const struct snd_soc_dapm_widget tegra186_asrc_widgets[] = {
0, 0), 0, 0),
SND_SOC_DAPM_AIF_IN("RX6", NULL, 0, SND_SOC_NOPM, SND_SOC_DAPM_AIF_IN("RX6", NULL, 0, SND_SOC_NOPM,
0, 0), 0, 0),
SND_SOC_DAPM_AIF_OUT("TX1", NULL, 0, TEGRA186_ASRC_STREAM1_ENABLE, SND_SOC_DAPM_AIF_OUT_E("TX1", NULL, 0, TEGRA186_ASRC_STREAM1_ENABLE,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0), TEGRA186_ASRC_STREAM_EN_SHIFT, 0,
SND_SOC_DAPM_AIF_OUT("TX2", NULL, 0, TEGRA186_ASRC_STREAM2_ENABLE, tegra186_asrc_req_arad_ratio,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0), SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_AIF_OUT("TX3", NULL, 0, TEGRA186_ASRC_STREAM3_ENABLE, SND_SOC_DAPM_AIF_OUT_E("TX2", NULL, 0, TEGRA186_ASRC_STREAM2_ENABLE,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0), TEGRA186_ASRC_STREAM_EN_SHIFT, 0,
SND_SOC_DAPM_AIF_OUT("TX4", NULL, 0, TEGRA186_ASRC_STREAM4_ENABLE, tegra186_asrc_req_arad_ratio,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0), SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_AIF_OUT("TX5", NULL, 0, TEGRA186_ASRC_STREAM5_ENABLE, SND_SOC_DAPM_AIF_OUT_E("TX3", NULL, 0, TEGRA186_ASRC_STREAM3_ENABLE,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0), TEGRA186_ASRC_STREAM_EN_SHIFT, 0,
SND_SOC_DAPM_AIF_OUT("TX6", NULL, 0, TEGRA186_ASRC_STREAM6_ENABLE, tegra186_asrc_req_arad_ratio,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0), SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_AIF_OUT_E("TX4", NULL, 0, TEGRA186_ASRC_STREAM4_ENABLE,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0,
tegra186_asrc_req_arad_ratio,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_AIF_OUT_E("TX5", NULL, 0, TEGRA186_ASRC_STREAM5_ENABLE,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0,
tegra186_asrc_req_arad_ratio,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_AIF_OUT_E("TX6", NULL, 0, TEGRA186_ASRC_STREAM6_ENABLE,
TEGRA186_ASRC_STREAM_EN_SHIFT, 0,
tegra186_asrc_req_arad_ratio,
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_IN("RX7", NULL), SND_SOC_DAPM_IN("RX7", NULL),
}; };