diff --git a/drivers/gpu/host1x-emu/include/linux/nvhost-emu-type.h b/drivers/gpu/host1x-emu/include/linux/nvhost-emu-type.h new file mode 100644 index 00000000..666fbfe4 --- /dev/null +++ b/drivers/gpu/host1x-emu/include/linux/nvhost-emu-type.h @@ -0,0 +1,170 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: GPL-2.0-only + */ +#ifndef __LINUX_NVHOST_EMU_TYPE_H +#define __LINUX_NVHOST_EMU_TYPE_H + +#include +#include +#include +#include + +/** + * TODO: Remove header after pre-silicon verification + * This header is required till emulation driver verification is done on Tho-r + * VDK platform. Since we are exporting new kernel symbol, header with declarion + * of modified symbols is required + * + * Changed cannot be added in orignal Host1x driver header files ("linux/nvhost.h" + * and "host1x-next.h") due to Host1x driver and other dependent drivers. Note in + * Tho-r verification config both the driver will co-exist. + * + * Some data structure are also re-delacred in this header for case where client + * driver wants to verify over emulation driver. + */ + +struct nvhost_ctrl_sync_fence_info; +struct nvhost_fence; + +#define NVHOST_MODULE_MAX_CLOCKS 8 +#define NVHOST_MODULE_MAX_IORESOURCE_MEM 5 + +enum tegra_emc_request_type { + TEGRA_SET_EMC_FLOOR, /* lower bound */ +}; + +struct nvhost_clock { + char *name; + unsigned long default_rate; + u32 moduleid; + enum tegra_emc_request_type request_type; + bool disable_scaling; + unsigned long devfreq_rate; +}; + +struct nvhost_vm_hwid { + u64 addr; + bool dynamic; + u32 shift; +}; + +/* + * Defines HW and SW class identifiers. + * + * This is module ID mapping between userspace and kernelspace. + * The values of enum entries' are referred from NvRmModuleID enum defined + * in below userspace file: + * $TOP/vendor/nvidia/tegra/core/include/nvrm_module.h + * Please make sure each entry below has same value as set in above file. + */ +enum nvhost_module_identifier { + /* Specifies external memory (DDR RAM, etc) */ + NVHOST_MODULE_ID_EXTERNAL_MEMORY_CONTROLLER = 75, +}; + +enum nvhost_resource_policy { + RESOURCE_PER_DEVICE = 0, + RESOURCE_PER_CHANNEL_INSTANCE, +}; + +struct nvhost_device_data { + int version; /* ip version number of device */ + void __iomem *aperture[NVHOST_MODULE_MAX_IORESOURCE_MEM]; + + u32 moduleid; /* Module id for user space API */ + + /* interrupt ISR routine for falcon based engines */ + int (*flcn_isr)(struct platform_device *dev); + int irq; + int module_irq; /* IRQ bit from general intr reg for module intr */ + bool self_config_flcn_isr; /* skip setting up falcon interrupts */ + + u32 class; /* Device class */ + bool keepalive; /* Do not power gate when opened */ + bool serialize; /* Serialize submits in the channel */ + bool push_work_done; /* Push_op done into push buffer */ + bool poweron_reset; /* Reset the engine before powerup */ + char *devfs_name; /* Name in devfs */ + char *devfs_name_family; /* Core of devfs name */ + + char *firmware_name; /* Name of firmware */ + bool firmware_not_in_subdir; /* Firmware is not located in + chip subdirectory */ + + bool engine_can_cg; /* True if CG is enabled */ + bool can_powergate; /* True if module can be power gated */ + int autosuspend_delay; /* Delay before power gated */ + struct nvhost_clock clocks[NVHOST_MODULE_MAX_CLOCKS];/* Clock names */ + + int num_clks; /* Number of clocks opened for dev */ + struct clk_bulk_data *clks; + struct mutex lock; /* Power management lock */ + + int num_channels; /* Max num of channel supported */ + int num_ppc; /* Number of pixels per clock cycle */ + dev_t cdev_region; + + /* device node for ctrl block */ + struct class *nvhost_class; + struct device *ctrl_node; + struct cdev ctrl_cdev; + const struct file_operations *ctrl_ops; /* ctrl ops for the module */ + + struct kobject clk_cap_kobj; + struct kobj_attribute *clk_cap_attrs; + struct dentry *debugfs; /* debugfs directory */ + + /* Marks if the device is booted when pm runtime is disabled */ + bool booted; + + void *private_data; /* private platform data */ + void *falcon_data; /* store the falcon info */ + struct platform_device *pdev; /* owner platform_device */ + struct host1x *host1x; /* host1x device */ + + /* Finalize power on. Can be used for context restore. */ + int (*finalize_poweron)(struct platform_device *dev); + + /* Preparing for power off. Used for context save. */ + int (*prepare_poweroff)(struct platform_device *dev); + + /* paring for power off. Used for context save. */ + int (*aggregate_constraints)(struct platform_device *dev, + int clk_index, + unsigned long floor_rate, + unsigned long pixel_rate, + unsigned long bw_rate); + + /* Used to add platform specific masks on reloc address */ + dma_addr_t (*get_reloc_phys_addr)(dma_addr_t phys_addr, u32 reloc_type); + + /* engine specific init functions */ + int (*pre_virt_init)(struct platform_device *pdev); + int (*post_virt_init)(struct platform_device *pdev); + + /* Information related to engine-side synchronization */ + void *syncpt_unit_interface; + + u64 transcfg_addr; + u32 transcfg_val; + struct nvhost_vm_hwid vm_regs[13]; + + /* Should we map channel at submit time? */ + bool resource_policy; + /* Should we enable context isolation for this device? */ + bool isolate_contexts; + + /* reset control for this device */ + struct reset_control *reset_control; + + /* icc client id for emc requests */ + int icc_id; + + /* icc_path handle handle */ + struct icc_path *icc_path_handle; + + /* bandwidth manager client id for emc requests */ + int bwmgr_client_id; +}; +#endif /*__LINUX_NVHOST_EMU_TYPE_H*/ diff --git a/drivers/gpu/host1x-emu/include/linux/nvhost-emu.h b/drivers/gpu/host1x-emu/include/linux/nvhost-emu.h index 4b1e0292..2c44cb7d 100644 --- a/drivers/gpu/host1x-emu/include/linux/nvhost-emu.h +++ b/drivers/gpu/host1x-emu/include/linux/nvhost-emu.h @@ -9,166 +9,9 @@ #include #include #include +#include #include -/** - * TODO: Remove header after pre-silicon verification - * This header is required till emulation driver verification is done on Tho-r - * VDK platform. Since we are exporting new kernel symbol, header with declarion - * of modified symbols is required - * - * Changed cannot be added in orignal Host1x driver header files ("linux/nvhost.h" - * and "host1x-next.h") due to Host1x driver and other dependent drivers. Note in - * Tho-r verification config both the driver will co-exist. - * - * Some data structure are also re-delacred in this header for case where client - * driver wants to verify over emulation driver. - */ - -struct nvhost_ctrl_sync_fence_info; -struct nvhost_fence; - -#define NVHOST_MODULE_MAX_CLOCKS 8 -#define NVHOST_MODULE_MAX_IORESOURCE_MEM 5 - -enum tegra_emc_request_type { - TEGRA_SET_EMC_FLOOR, /* lower bound */ -}; - -struct nvhost_clock { - char *name; - unsigned long default_rate; - u32 moduleid; - enum tegra_emc_request_type request_type; - bool disable_scaling; - unsigned long devfreq_rate; -}; - -struct nvhost_vm_hwid { - u64 addr; - bool dynamic; - u32 shift; -}; - -/* - * Defines HW and SW class identifiers. - * - * This is module ID mapping between userspace and kernelspace. - * The values of enum entries' are referred from NvRmModuleID enum defined - * in below userspace file: - * $TOP/vendor/nvidia/tegra/core/include/nvrm_module.h - * Please make sure each entry below has same value as set in above file. - */ -enum nvhost_module_identifier { - /* Specifies external memory (DDR RAM, etc) */ - NVHOST_MODULE_ID_EXTERNAL_MEMORY_CONTROLLER = 75, -}; - -enum nvhost_resource_policy { - RESOURCE_PER_DEVICE = 0, - RESOURCE_PER_CHANNEL_INSTANCE, -}; - -struct nvhost_device_data { - int version; /* ip version number of device */ - void __iomem *aperture[NVHOST_MODULE_MAX_IORESOURCE_MEM]; - - u32 moduleid; /* Module id for user space API */ - - /* interrupt ISR routine for falcon based engines */ - int (*flcn_isr)(struct platform_device *dev); - int irq; - int module_irq; /* IRQ bit from general intr reg for module intr */ - bool self_config_flcn_isr; /* skip setting up falcon interrupts */ - - u32 class; /* Device class */ - bool keepalive; /* Do not power gate when opened */ - bool serialize; /* Serialize submits in the channel */ - bool push_work_done; /* Push_op done into push buffer */ - bool poweron_reset; /* Reset the engine before powerup */ - char *devfs_name; /* Name in devfs */ - char *devfs_name_family; /* Core of devfs name */ - - char *firmware_name; /* Name of firmware */ - bool firmware_not_in_subdir; /* Firmware is not located in - chip subdirectory */ - - bool engine_can_cg; /* True if CG is enabled */ - bool can_powergate; /* True if module can be power gated */ - int autosuspend_delay; /* Delay before power gated */ - struct nvhost_clock clocks[NVHOST_MODULE_MAX_CLOCKS];/* Clock names */ - - int num_clks; /* Number of clocks opened for dev */ - struct clk_bulk_data *clks; - struct mutex lock; /* Power management lock */ - - int num_channels; /* Max num of channel supported */ - int num_ppc; /* Number of pixels per clock cycle */ - dev_t cdev_region; - - /* device node for ctrl block */ - struct class *nvhost_class; - struct device *ctrl_node; - struct cdev ctrl_cdev; - const struct file_operations *ctrl_ops; /* ctrl ops for the module */ - - struct kobject clk_cap_kobj; - struct kobj_attribute *clk_cap_attrs; - struct dentry *debugfs; /* debugfs directory */ - - /* Marks if the device is booted when pm runtime is disabled */ - bool booted; - - void *private_data; /* private platform data */ - void *falcon_data; /* store the falcon info */ - struct platform_device *pdev; /* owner platform_device */ - struct host1x *host1x; /* host1x device */ - - /* Finalize power on. Can be used for context restore. */ - int (*finalize_poweron)(struct platform_device *dev); - - /* Preparing for power off. Used for context save. */ - int (*prepare_poweroff)(struct platform_device *dev); - - /* paring for power off. Used for context save. */ - int (*aggregate_constraints)(struct platform_device *dev, - int clk_index, - unsigned long floor_rate, - unsigned long pixel_rate, - unsigned long bw_rate); - - /* Used to add platform specific masks on reloc address */ - dma_addr_t (*get_reloc_phys_addr)(dma_addr_t phys_addr, u32 reloc_type); - - /* engine specific init functions */ - int (*pre_virt_init)(struct platform_device *pdev); - int (*post_virt_init)(struct platform_device *pdev); - - /* Information related to engine-side synchronization */ - void *syncpt_unit_interface; - - u64 transcfg_addr; - u32 transcfg_val; - struct nvhost_vm_hwid vm_regs[13]; - - /* Should we map channel at submit time? */ - bool resource_policy; - /* Should we enable context isolation for this device? */ - bool isolate_contexts; - - /* reset control for this device */ - struct reset_control *reset_control; - - /* icc client id for emc requests */ - int icc_id; - - /* icc_path handle handle */ - struct icc_path *icc_path_handle; - - /* bandwidth manager client id for emc requests */ - int bwmgr_client_id; -}; - static inline struct nvhost_device_data *nvhost_get_devdata(struct platform_device *pdev) { diff --git a/drivers/gpu/host1x-emu/include/linux/symbol-emu.h b/drivers/gpu/host1x-emu/include/linux/symbol-emu.h index 446e58d0..fb901772 100644 --- a/drivers/gpu/host1x-emu/include/linux/symbol-emu.h +++ b/drivers/gpu/host1x-emu/include/linux/symbol-emu.h @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only // SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -#ifndef __HOST1X_EMU_SYMMBOL_H -#define __HOST1X_EMU_SYMMBOL_H +#ifndef __LINUX_HOST1X_SYMMBOL_EMU_H +#define __LINUX_HOST1X_SYMMBOL_EMU_H #ifdef CONFIG_TEGRA_HOST1X_EMU_DBG_SYMBL #define HOST1X_EMU_EXPORT_CALL(...) Emu_ ## __VA_ARGS__ @@ -15,4 +15,4 @@ #define HOST1X_EMU_EXPORT_SYMBOL_NAME(f) f #endif -#endif /*__HOST1X_EMU_SYMMBOL_H*/ +#endif /*__LINUX_HOST1X_SYMMBOL_EMU_H*/ diff --git a/drivers/video/tegra/host/nvdla/axi/Makefile b/drivers/video/tegra/host/nvdla/axi/Makefile index b5e4dbcc..7888778a 100644 --- a/drivers/video/tegra/host/nvdla/axi/Makefile +++ b/drivers/video/tegra/host/nvdla/axi/Makefile @@ -15,8 +15,9 @@ ccflags-y += -I$(srctree.nvidia-oot)/drivers/video/tegra/host/nvdla ccflags-y += -I$(srctree.nvidia-oot)/drivers/video/tegra/host/nvdla/port/fw endif +#required to get the nvhost_device struture definitions LINUXINCLUDE += -I$(srctree.nvidia-oot)/drivers/gpu/host1x-emu/include -ccflags-y += -DCONFIG_TEGRA_HOST1X_EMU_DBG_SYMBL +LINUXINCLUDE += -I$(srctree.nvidia-oot)/drivers/gpu/host1x-fence/include # # axi-nvdla.ko diff --git a/drivers/video/tegra/host/nvdla/port/device/nvdla_device_axi.c b/drivers/video/tegra/host/nvdla/port/device/nvdla_device_axi.c index 83075c32..7cfc936c 100644 --- a/drivers/video/tegra/host/nvdla/port/device/nvdla_device_axi.c +++ b/drivers/video/tegra/host/nvdla/port/device/nvdla_device_axi.c @@ -14,10 +14,11 @@ #include #include #include -#include #include #include #include +#include +#include #define NVDLA_NUM_CDEV 1 @@ -49,7 +50,7 @@ static int32_t s_nvdla_module_get_platform_resources( struct nvhost_device_data *pdata = platform_get_drvdata(pdev); int32_t i; - pdata->host1x = HOST1X_EMU_EXPORT_CALL(nvhost_get_host1x(pdev)); + pdata->host1x = nvhost_get_host1x(pdev); if (pdata->host1x == NULL) { nvdla_dbg_err(pdev, "Failed to get private data\n"); err = -ENODEV; diff --git a/drivers/video/tegra/host/nvdla/port/nvdla_host_wrapper.h b/drivers/video/tegra/host/nvdla/port/nvdla_host_wrapper.h index 87eca4af..6494f0f5 100644 --- a/drivers/video/tegra/host/nvdla/port/nvdla_host_wrapper.h +++ b/drivers/video/tegra/host/nvdla/port/nvdla_host_wrapper.h @@ -8,7 +8,8 @@ #define __NVDLA_HOST_WRAPPER_H__ #if defined(NVDLA_HAVE_CONFIG_AXI) && (NVDLA_HAVE_CONFIG_AXI == 1) -#include +#include +#include struct nvhost_notification { struct { /* 0000- */ diff --git a/drivers/video/tegra/host/nvdla/port/sync/nvdla_sync_syncpt_emu.c b/drivers/video/tegra/host/nvdla/port/sync/nvdla_sync_syncpt_emu.c index f945fa52..03fb45c8 100644 --- a/drivers/video/tegra/host/nvdla/port/sync/nvdla_sync_syncpt_emu.c +++ b/drivers/video/tegra/host/nvdla/port/sync/nvdla_sync_syncpt_emu.c @@ -38,7 +38,7 @@ struct nvdla_sync_device *nvdla_sync_device_create_syncpoint( goto fail; } - err = HOST1X_EMU_EXPORT_CALL(nvhost_syncpt_unit_interface_init(pdev)); + err = nvhost_syncpt_unit_interface_init(pdev); if (err < 0) { nvdla_dbg_err(pdev, "failed to init syncpt interface. err=%d\n", err); @@ -63,8 +63,7 @@ void nvdla_sync_device_destroy(struct nvdla_sync_device *device) if (device->pdev == NULL) goto free_device; - HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_unit_interface_deinit(device->pdev)); + nvhost_syncpt_unit_interface_deinit(device->pdev); free_device: device->pdev = NULL; @@ -80,9 +79,7 @@ dma_addr_t nvdla_sync_get_address_by_syncptid( dma_addr_t address = 0ULL; if (device != NULL) - address = HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_address(device->pdev, - syncptid)); + address = nvhost_syncpt_address(device->pdev, syncptid); return address; } @@ -102,11 +99,9 @@ struct nvdla_sync_context *nvdla_sync_create(struct nvdla_sync_device *device) goto fail; } - context->syncptid = HOST1X_EMU_EXPORT_CALL( - nvhost_get_syncpt_host_managed(device->pdev, 0U, NULL)); + context->syncptid = nvhost_get_syncpt_host_managed(device->pdev, 0U, NULL); - context->address = HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_address(device->pdev, context->syncptid)); + context->address = nvhost_syncpt_address(device->pdev, context->syncptid); context->device = device; return context; @@ -124,8 +119,7 @@ void nvdla_sync_destroy(struct nvdla_sync_context *context) goto free_context; /* Release the syncpoint ID */ - HOST1X_EMU_EXPORT_CALL(nvhost_syncpt_put_ref_ext(context->device->pdev, - context->syncptid)); + nvhost_syncpt_put_ref_ext(context->device->pdev, context->syncptid); free_context: context->device = NULL; @@ -152,10 +146,9 @@ uint32_t nvdla_sync_increment_max_value(struct nvdla_sync_context *context, if ((context == NULL) || (context->device == NULL)) goto fail; - maxval = HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_incr_max_ext(context->device->pdev, + maxval = nvhost_syncpt_incr_max_ext(context->device->pdev, context->syncptid, - increment)); + increment); fail: return maxval; @@ -168,9 +161,8 @@ uint32_t nvdla_sync_get_max_value(struct nvdla_sync_context *context) if ((context == NULL) || (context->device == NULL)) goto fail; - maxval = HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_read_maxval(context->device->pdev, - context->syncptid)); + maxval = nvhost_syncpt_read_maxval(context->device->pdev, + context->syncptid); fail: return maxval; @@ -191,10 +183,9 @@ int32_t nvdla_sync_wait(struct nvdla_sync_context *context, device = context->device; if (timeout == 0ULL) { - wait_complete = HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_is_expired_ext(device->pdev, + wait_complete = nvhost_syncpt_is_expired_ext(device->pdev, context->syncptid, - threshold)); + threshold); if (wait_complete == 0) { nvdla_dbg_err(device->pdev, "Wait on sp[%u] for threshold[%u] timedout\n", @@ -224,10 +215,9 @@ int32_t nvdla_sync_signal(struct nvdla_sync_context *context, goto fail; } - HOST1X_EMU_EXPORT_CALL( - nvhost_syncpt_set_min_update(context->device->pdev, + nvhost_syncpt_set_min_update(context->device->pdev, context->syncptid, - signal_value)); + signal_value); fail: return err;