diff --git a/include/soc/tegra/camrtc-commands.h b/include/soc/tegra/camrtc-commands.h
index cec3056f..df415063 100644
--- a/include/soc/tegra/camrtc-commands.h
+++ b/include/soc/tegra/camrtc-commands.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+ * Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 /**
@@ -576,6 +576,31 @@
  */
 #define CAMRTC_HSP_BOOT_COMPLETE  MK_U32(0x4B)
 
+/**
+ * @brief PANIC message
+ *
+ * The CAMRTC_HSP_PANIC message message is a unidirectional message from RCE to client
+ * to log that RCE is about to go into a bad state. This typically occurs when RCE
+ * detects a critical hardware error or encounters an unrecoverable firmware state.
+ *
+ * Upon receiving this message, the client should dump out the trace buffer snapshot
+ * section for debugging purposes.
+ *
+ * @pre @ref CAMRTC_HSP_HELLO exchange has been completed.
+ *
+ * @par Response
+ * @rststar
+ * +-------+---------------------------------------------------+
+ * | Bits  | Description                                       |
+ * +=======+===================================================+
+ * | 30:24 | CAMRTC_HSP_PANIC                                  |
+ * +-------+---------------------------------------------------+
+ * | 23:0  | 0x000000                                          |
+ * +-------+---------------------------------------------------+
+ * @endrst
+ */
+#define CAMRTC_HSP_PANIC		MK_U32(0x4C)
+
 /** Reserved, not to be used. */
 #define CAMRTC_HSP_RESERVED_5E		MK_U32(0x5E) /* bug 200395605 */
 
diff --git a/include/soc/tegra/camrtc-trace.h b/include/soc/tegra/camrtc-trace.h
index a1f0680a..043370ba 100644
--- a/include/soc/tegra/camrtc-trace.h
+++ b/include/soc/tegra/camrtc-trace.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+ * Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  */
 
 #ifndef INCLUDE_CAMRTC_TRACE_H
@@ -49,6 +49,15 @@
 #define CAMRTC_TRACE_EXCEPTION_OFFSET	MK_U32(0x01000)
 #define CAMRTC_TRACE_EVENT_OFFSET	MK_U32(0x10000)
 
+/**
+ * @brief Number of entries in the snapshot section
+ *
+ * The snapshot section stores system state captures that can be
+ * used for debugging and diagnostics. The size is set to 0x400
+ * entries to balance memory usage with debug information coverage.
+ */
+#define CAMRTC_TRACE_SNAPSHOT_ENTRIES	MK_U32(0x400)
+
 /* Size of each entry */
 #define CAMRTC_TRACE_EXCEPTION_SIZE	MK_SIZE(1024)
 #define CAMRTC_TRACE_EVENT_SIZE		MK_SIZE(64)
@@ -87,13 +96,16 @@ struct camrtc_trace_memory_header {
 	uint32_t event_offset;
 	uint32_t event_size;
 	uint32_t event_entries;
-	uint32_t reserved3;
-	uint32_t reserved4[0xc8 / 4];
+	uint32_t snapshot_offset;
+	uint32_t snapshot_size;
+	uint32_t snapshot_entries;
+	uint32_t reserved4[0xc0 / 4];
 
 	/* pointer: offset 0x100 */
 	uint32_t exception_next_idx;
 	uint32_t event_next_idx;
-	uint32_t reserved_ptrs[0x38 / 4];
+	uint32_t snapshot_next_idx;
+	uint32_t reserved_ptrs[0x34 / 4];
 } CAMRTC_TRACE_ALIGN;
 
 /*