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drm/tegra: Fix Engine timestamp shift factor

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In Orin and previous chipsets, engine timestamp counter
runs 32 times faster than CNTVCT register, so the actual
timestamp is obtained by right shifting with factor of 5.
In Thor onwards, this shift is not required is for VIC engine.

Jira HOSTX-5905

Change-Id: I69980fdfcf50b15db99b1fbad522aecd571a0f17
Signed-off-by: Mainak Sen <msen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3306825
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mainak Sen
2025-02-20 11:26:39 +00:00
committed by Jon Hunter
parent a674701be0
commit db0d9da92f
9 changed files with 35 additions and 9 deletions
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4
drivers/gpu/drm/tegra/nvdec.c
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@@ -714,11 +714,13 @@ static int nvdec_can_use_memory_ctx(struct tegra_drm_client *client, bool *suppo
return 0;
}
static int nvdec_has_job_timestamping(struct tegra_drm_client *client, bool *supported)
static int nvdec_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{
struct nvdec *nvdec = to_nvdec(client);
*supported = nvdec->config->supports_timestamping;
*timestamp_shift = 5;
return 0;
}