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drm/tegra: Fix Engine timestamp shift factor

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In Orin and previous chipsets, engine timestamp counter
runs 32 times faster than CNTVCT register, so the actual
timestamp is obtained by right shifting with factor of 5.
In Thor onwards, this shift is not required is for VIC engine.

Jira HOSTX-5905

Change-Id: I69980fdfcf50b15db99b1fbad522aecd571a0f17
Signed-off-by: Mainak Sen <msen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3306825
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mainak Sen
2025-02-20 11:26:39 +00:00
committed by Jon Hunter
parent a674701be0
commit db0d9da92f
9 changed files with 35 additions and 9 deletions
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3
drivers/gpu/drm/tegra/drm.h
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@@ -88,7 +88,8 @@ struct tegra_drm_client_ops {
struct drm_file *file); struct drm_file *file);
int (*get_streamid_offset)(struct tegra_drm_client *client, u32 *offset); int (*get_streamid_offset)(struct tegra_drm_client *client, u32 *offset);
int (*can_use_memory_ctx)(struct tegra_drm_client *client, bool *supported); int (*can_use_memory_ctx)(struct tegra_drm_client *client, bool *supported);
int (*has_job_timestamping)(struct tegra_drm_client *client, bool *supported); int (*has_job_timestamping)(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift);
int (*skip_bl_swizzling)(struct tegra_drm_client *client, bool *skip); int (*skip_bl_swizzling)(struct tegra_drm_client *client, bool *skip);
}; };

4
drivers/gpu/drm/tegra/nvdec.c
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@@ -714,11 +714,13 @@ static int nvdec_can_use_memory_ctx(struct tegra_drm_client *client, bool *suppo
return 0; return 0;
} }
static int nvdec_has_job_timestamping(struct tegra_drm_client *client, bool *supported) static int nvdec_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{ {
struct nvdec *nvdec = to_nvdec(client); struct nvdec *nvdec = to_nvdec(client);
*supported = nvdec->config->supports_timestamping; *supported = nvdec->config->supports_timestamping;
*timestamp_shift = 5;
return 0; return 0;
} }

4
drivers/gpu/drm/tegra/nvenc.c
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@@ -587,11 +587,13 @@ static int nvenc_can_use_memory_ctx(struct tegra_drm_client *client, bool *suppo
return 0; return 0;
} }
static int nvenc_has_job_timestamping(struct tegra_drm_client *client, bool *supported) static int nvenc_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{ {
struct nvenc *nvenc = to_nvenc(client); struct nvenc *nvenc = to_nvenc(client);
*supported = nvenc->config->supports_timestamping; *supported = nvenc->config->supports_timestamping;
*timestamp_shift = 5;
return 0; return 0;
} }

4
drivers/gpu/drm/tegra/nvjpg.c
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@@ -557,11 +557,13 @@ static int nvjpg_can_use_memory_ctx(struct tegra_drm_client *client, bool *suppo
return 0; return 0;
} }
static int nvjpg_has_job_timestamping(struct tegra_drm_client *client, bool *supported) static int nvjpg_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{ {
struct nvjpg *nvjpg = to_nvjpg(client); struct nvjpg *nvjpg = to_nvjpg(client);
*supported = nvjpg->config->supports_timestamping; *supported = nvjpg->config->supports_timestamping;
*timestamp_shift = 5;
return 0; return 0;
} }

4
drivers/gpu/drm/tegra/ofa.c
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@@ -511,9 +511,11 @@ static int ofa_can_use_memory_ctx(struct tegra_drm_client *client, bool *support
return 0; return 0;
} }
static int ofa_has_job_timestamping(struct tegra_drm_client *client, bool *supported) static int ofa_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{ {
*supported = true; *supported = true;
*timestamp_shift = 5;
return 0; return 0;
} }

9
drivers/gpu/drm/tegra/submit.c
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@@ -538,9 +538,11 @@ static void release_job(struct host1x_job *job)
if (IS_ENABLED(CONFIG_TRACING) && job_data->timestamps.virt) { if (IS_ENABLED(CONFIG_TRACING) && job_data->timestamps.virt) {
u64 *timestamps = job_data->timestamps.virt; u64 *timestamps = job_data->timestamps.virt;
u32 shift = job_data->timestamps.timestamp_shift;
if (timestamps[0] != 0) if (timestamps[0] != 0)
trace_job_timestamps(job_data->id, timestamps[0] >> 5, timestamps[1] >> 5); trace_job_timestamps(job_data->id, timestamps[0] >> shift,
timestamps[1] >> shift);
dma_free_coherent(job_data->timestamps.dev, 256, job_data->timestamps.virt, dma_free_coherent(job_data->timestamps.dev, 256, job_data->timestamps.virt,
job_data->timestamps.iova); job_data->timestamps.iova);
@@ -568,12 +570,14 @@ static int submit_init_profiling(struct tegra_drm_context *context,
{ {
struct device *mem_dev = tegra_drm_context_get_memory_device(context); struct device *mem_dev = tegra_drm_context_get_memory_device(context);
bool has_timestamping = false; bool has_timestamping = false;
u32 timestamp_shift;
int err; int err;
if (!context->client->ops->has_job_timestamping) if (!context->client->ops->has_job_timestamping)
return 0; return 0;
err = context->client->ops->has_job_timestamping(context->client, &has_timestamping); err = context->client->ops->has_job_timestamping(context->client, &has_timestamping,
&timestamp_shift);
if (err) if (err)
return err; return err;
@@ -586,6 +590,7 @@ static int submit_init_profiling(struct tegra_drm_context *context,
return -ENOMEM; return -ENOMEM;
job_data->timestamps.dev = mem_dev; job_data->timestamps.dev = mem_dev;
job_data->timestamps.timestamp_shift = timestamp_shift;
return 0; return 0;
} }

1
drivers/gpu/drm/tegra/submit.h
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@@ -18,6 +18,7 @@ struct tegra_drm_submit_data {
struct device *dev; struct device *dev;
dma_addr_t iova; dma_addr_t iova;
void *virt; void *virt;
u32 timestamp_shift;
} timestamps; } timestamps;
}; };

8
drivers/gpu/drm/tegra/vic.c
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@@ -65,6 +65,7 @@ struct vic_config {
u32 actmon_active_borps; u32 actmon_active_borps;
u32 actmon_active_weight; u32 actmon_active_weight;
bool skip_bl_swizzling; bool skip_bl_swizzling;
u32 timestamp_shift;
}; };
struct vic { struct vic {
@@ -800,11 +801,13 @@ static int vic_can_use_memory_ctx(struct tegra_drm_client *client, bool *support
return 0; return 0;
} }
static int vic_has_job_timestamping(struct tegra_drm_client *client, bool *supported) static int vic_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{ {
struct vic *vic = to_vic(client); struct vic *vic = to_vic(client);
*supported = vic->config->supports_timestamping; *supported = vic->config->supports_timestamping;
*timestamp_shift = vic->config->timestamp_shift;
return 0; return 0;
} }
@@ -867,6 +870,7 @@ static const struct vic_config vic_t194_config = {
.actmon_active_mask = 0x204c, .actmon_active_mask = 0x204c,
.actmon_active_borps = 0x2050, .actmon_active_borps = 0x2050,
.actmon_active_weight = 0x2054, .actmon_active_weight = 0x2054,
.timestamp_shift = 5,
}; };
#define NVIDIA_TEGRA_234_VIC_FIRMWARE "nvidia/tegra234/vic.bin" #define NVIDIA_TEGRA_234_VIC_FIRMWARE "nvidia/tegra234/vic.bin"
@@ -881,6 +885,7 @@ static const struct vic_config vic_t234_config = {
.actmon_active_mask = 0x204c, .actmon_active_mask = 0x204c,
.actmon_active_borps = 0x2050, .actmon_active_borps = 0x2050,
.actmon_active_weight = 0x2054, .actmon_active_weight = 0x2054,
.timestamp_shift = 5,
}; };
#define NVIDIA_TEGRA_264_VIC_FIRMWARE "nvidia/tegra264/vic.bin" #define NVIDIA_TEGRA_264_VIC_FIRMWARE "nvidia/tegra264/vic.bin"
@@ -897,6 +902,7 @@ static const struct vic_config vic_t264_config = {
.actmon_active_borps = 0x2250, .actmon_active_borps = 0x2250,
.actmon_active_weight = 0x2254, .actmon_active_weight = 0x2254,
.skip_bl_swizzling = true, .skip_bl_swizzling = true,
.timestamp_shift = 0,
}; };
static const struct of_device_id tegra_vic_of_match[] = { static const struct of_device_id tegra_vic_of_match[] = {

7
drivers/gpu/drm/tegra/virt.c
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@@ -133,9 +133,14 @@ static int virt_engine_can_use_memory_ctx(struct tegra_drm_client *client, bool
return 0; return 0;
} }
static int virt_engine_has_job_timestamping(struct tegra_drm_client *client, bool *supported) static int virt_engine_has_job_timestamping(struct tegra_drm_client *client, bool *supported,
u32 *timestamp_shift)
{ {
*supported = true; *supported = true;
*timestamp_shift = 5;
if (of_machine_is_compatible("nvidia,tegra264"))
*timestamp_shift = 0;
return 0; return 0;
} }