Documentation: Fix error from dt_binding_check

Fix the errors generated when running the dt_binding_check on the
DT binding document yaml format.

Change-Id: Ie000447c97e92532755a484be02c5b347216d774
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2702785
GVS: Gerrit_Virtual_Submit

Documentation/devicetree/bindings/mfd/nvidia-vrs-pseq.yaml

@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/mfd/nvidia-vrs-seq.yaml#
+$id: http://devicetree.org/schemas/mfd/nvidia-vrs-pseq.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: NVIDIA VRS sequencer driver
@@ -28,15 +28,10 @@ properties:
   interrupt-controller: true
 
   "#interrupt-cells":
-    const: 2
+    const: 3
     description:
       The first cell is the IRQ number, the second cell is the trigger type.
 
-  rtc:
-    $ref: ../rtc/nvidia-vrs-rtc.yaml
-
-
-
 required:
   - compatible
   - reg
@@ -48,8 +43,15 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #define TEGRA234_IRQ_PMIC_EXT_INTR             209
+
     bpmp {
         i2c {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
             vrs@3c {
                 compatible = "nvidia,vrs-pseq";
                 reg = <0x3c>;
@@ -58,10 +60,6 @@ examples:
                 interrupts = <GIC_SPI TEGRA234_IRQ_PMIC_EXT_INTR IRQ_TYPE_LEVEL_HIGH>;
                 interrupt-controller;
                 #interrupt-cells = <3>;
-
-                vrs_rtc: rtc {
-                        status = "okay";
-                };
             };
         };
     };

Documentation/devicetree/bindings/thermal/pex9749-thermal.yaml

@@ -31,10 +31,14 @@ additionalProperties: false
 
 examples:
   - |
-     i2c@3180000 {
-         pex9749: pex9749@5f {
-             compatible = "pex9749";
-             reg = <0x5f>;
-             #thermal-sensor-cells = <1>;
-         };
-     };
+    i2c@3180000 {
+        reg = <0x3180000 0x0>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        pex9749: pex9749@5f {
+           compatible = "pex9749";
+           reg = <0x5f>;
+           #thermal-sensor-cells = <1>;
+       };
+    };
+...

Documentation/devicetree/bindings/watchdog/watchdog-tegra-t18x.yaml

@@ -17,19 +17,17 @@ allOf:
 
 properties:
   compatible:
-    oneOf:
-      - const: nvidia,tegra-wdt-t234
-      - const: nvidia,tegra-wdt-t19x
-      - const: nvidia,tegra-wdt-t18x
-      - const: nvidia,tegra-wdt-t18x-linsim
+    enum:
+      - nvidia,tegra-wdt-t234
+      - nvidia,tegra-wdt-t19x
+      - nvidia,tegra-wdt-t18x
+      - nvidia,tegra-wdt-t18x-linsim
 
   reg:
-    maxItems: 3
-    description: |
-       This driver required base register of three controller as
-       first entry is for the watchdog timer 0 address,
-       second entry is for the address of the Timer0 and
-       third entry is for the address of TKE.
+    items:
+      - description: Base register address and size of the watchdog timer 0.
+      - description: Base register address and size of the Timer 0.
+      - description: Base register address and size of the TKE.
 
   interrupts:
     maxItems: 1
@@ -97,17 +95,22 @@ unevaluatedProperties: false
 
 examples:
   - |
-    watchdog@2190000 {
-       compatible = "nvidia,tegra-wdt-t234";
-       reg = <0x0 0x02190000 0x0 0x10000>, /* WDT0 */
-             <0x0 0x02090000 0x0 0x10000>, /* TMR0 */
-             <0x0 0x02080000 0x0 0x10000>; /* TKE */
-       interrupts = <0 7 0x4 0 8 0x4>; /* TKE shared int */
-       nvidia,watchdog-index = <0>;
-       nvidia,timer-index = <7>;
-       nvidia,enable-on-init;
-       nvidia,extend-watchdog-suspend;
-       timeout-sec = <120>;
-       nvidia,disable-debug-reset;
-    };
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        watchdog@2190000 {
+           compatible = "nvidia,tegra-wdt-t234";
+           reg = <0x0 0x02190000 0x0 0x10000>, /* WDT0 */
+                 <0x0 0x02090000 0x0 0x10000>, /* TMR0 */
+                 <0x0 0x02080000 0x0 0x10000>; /* TKE */
+           interrupts = <0 7 0x4 0 8 0x4>; /* TKE shared int */
+           nvidia,watchdog-index = <0>;
+           nvidia,timer-index = <7>;
+           nvidia,enable-on-init;
+           nvidia,extend-watchdog-suspend;
+           timeout-sec = <120>;
+           nvidia,disable-debug-reset;
+        };
+     };
 ...