Documentation: Fix error from dt_binding_check

Fix the errors generated when running the dt_binding_check on the
DT binding document yaml format.

Change-Id: Ie000447c97e92532755a484be02c5b347216d774
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2702785
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Laxman Dewangan
2022-04-26 11:22:26 +05:30
committed by mobile promotions
parent e6d27a79da
commit dc5237350d
3 changed files with 47 additions and 42 deletions

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2 %YAML 1.2
--- ---
$id: http://devicetree.org/schemas/mfd/nvidia-vrs-seq.yaml# $id: http://devicetree.org/schemas/mfd/nvidia-vrs-pseq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA VRS sequencer driver title: NVIDIA VRS sequencer driver
@@ -28,15 +28,10 @@ properties:
interrupt-controller: true interrupt-controller: true
"#interrupt-cells": "#interrupt-cells":
const: 2 const: 3
description: description:
The first cell is the IRQ number, the second cell is the trigger type. The first cell is the IRQ number, the second cell is the trigger type.
rtc:
$ref: ../rtc/nvidia-vrs-rtc.yaml
required: required:
- compatible - compatible
- reg - reg
@@ -48,8 +43,15 @@ additionalProperties: false
examples: examples:
- | - |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#define TEGRA234_IRQ_PMIC_EXT_INTR 209
bpmp { bpmp {
i2c { i2c {
#address-cells = <1>;
#size-cells = <0>;
vrs@3c { vrs@3c {
compatible = "nvidia,vrs-pseq"; compatible = "nvidia,vrs-pseq";
reg = <0x3c>; reg = <0x3c>;
@@ -58,10 +60,6 @@ examples:
interrupts = <GIC_SPI TEGRA234_IRQ_PMIC_EXT_INTR IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI TEGRA234_IRQ_PMIC_EXT_INTR IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <3>; #interrupt-cells = <3>;
vrs_rtc: rtc {
status = "okay";
};
}; };
}; };
}; };

View File

@@ -32,9 +32,13 @@ additionalProperties: false
examples: examples:
- | - |
i2c@3180000 { i2c@3180000 {
reg = <0x3180000 0x0>;
#address-cells = <1>;
#size-cells = <0>;
pex9749: pex9749@5f { pex9749: pex9749@5f {
compatible = "pex9749"; compatible = "pex9749";
reg = <0x5f>; reg = <0x5f>;
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
}; };
}; };
...

View File

@@ -17,19 +17,17 @@ allOf:
properties: properties:
compatible: compatible:
oneOf: enum:
- const: nvidia,tegra-wdt-t234 - nvidia,tegra-wdt-t234
- const: nvidia,tegra-wdt-t19x - nvidia,tegra-wdt-t19x
- const: nvidia,tegra-wdt-t18x - nvidia,tegra-wdt-t18x
- const: nvidia,tegra-wdt-t18x-linsim - nvidia,tegra-wdt-t18x-linsim
reg: reg:
maxItems: 3 items:
description: | - description: Base register address and size of the watchdog timer 0.
This driver required base register of three controller as - description: Base register address and size of the Timer 0.
first entry is for the watchdog timer 0 address, - description: Base register address and size of the TKE.
second entry is for the address of the Timer0 and
third entry is for the address of TKE.
interrupts: interrupts:
maxItems: 1 maxItems: 1
@@ -97,6 +95,10 @@ unevaluatedProperties: false
examples: examples:
- | - |
soc {
#address-cells = <2>;
#size-cells = <2>;
watchdog@2190000 { watchdog@2190000 {
compatible = "nvidia,tegra-wdt-t234"; compatible = "nvidia,tegra-wdt-t234";
reg = <0x0 0x02190000 0x0 0x10000>, /* WDT0 */ reg = <0x0 0x02190000 0x0 0x10000>, /* WDT0 */
@@ -110,4 +112,5 @@ examples:
timeout-sec = <120>; timeout-sec = <120>;
nvidia,disable-debug-reset; nvidia,disable-debug-reset;
}; };
};
... ...