From dd889690208cbbe0b8ab0b65427cded7a4c752c4 Mon Sep 17 00:00:00 2001 From: Vishwaroop A Date: Mon, 13 Mar 2023 10:32:33 +0000 Subject: [PATCH] spi: tegra210-quad: fix combined sequence programming Fix the failures observed in combined sequence programming while validating qspi flash on orin platforms. Change-Id: Ifd404eebfc1480f328c58930c95b30903f2d3269 Signed-off-by: Vishwaroop A Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2869997 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-cert Reviewed-by: Krishna Yarlagadda Reviewed-by: Laxman Dewangan GVS: Gerrit_Virtual_Submit --- drivers/spi/spi-tegra210-quad.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index d0588e0a..a49543a6 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -1117,11 +1117,13 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi, address_value = *((const u32 *)(xfer->tx_buf)); break; case DUMMY_TRANSFER: - case DATA_TRANSFER: if (xfer->dummy_data) { tqspi->dummy_cycles = xfer->len * 8 / xfer->tx_nbits; break; + } else { + transfer_phase++; } + case DATA_TRANSFER: /* Program Command, Address value in register */ tegra_qspi_writel(tqspi, cmd_value, QSPI_CMB_SEQ_CMD); tegra_qspi_writel(tqspi, address_value,