diff --git a/drivers/platform/tegra/dce/dce-ipc.c b/drivers/platform/tegra/dce/dce-ipc.c
index 59184ac8..e1e98260 100644
--- a/drivers/platform/tegra/dce/dce-ipc.c
+++ b/drivers/platform/tegra/dce/dce-ipc.c
@@ -155,13 +155,15 @@ int dce_ipc_allocate_region(struct tegra_dce *d)
 	dev = dev_from_dce(d);
 	region = &d->d_ipc.region;
 
-	tot_q_sz = ((DCE_ADMIN_CMD_MAX_NFRAMES
-			* tegra_ivc_align(DCE_ADMIN_CMD_MAX_FSIZE)
-			* 2) + (DCE_DISPRM_CMD_MAX_NFRAMES
-			* tegra_ivc_align(DCE_DISPRM_CMD_MAX_FSIZE)
-			* 2) + (DCE_ADMIN_CMD_MAX_NFRAMES
-			* tegra_ivc_align(DCE_ADMIN_CMD_CHAN_FSIZE)
-			* 2));
+	tot_q_sz = ((DCE_ADMIN_CMD_MAX_NFRAMES *
+		     tegra_ivc_align(DCE_ADMIN_CMD_MAX_FSIZE) * 2) +
+		    (DCE_DISPRM_CMD_MAX_NFRAMES	*
+		     tegra_ivc_align(DCE_DISPRM_CMD_MAX_FSIZE) * 2) +
+		    (DCE_ADMIN_CMD_MAX_NFRAMES *
+		     tegra_ivc_align(DCE_ADMIN_CMD_CHAN_FSIZE) * 2) +
+		    (DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_NFRAMES *
+		     tegra_ivc_align(DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_FSIZE) * 2)
+		   );
 
 	tot_ivc_q_sz = tegra_ivc_total_queue_size(tot_q_sz);
 	region->size = dce_get_nxt_pow_of_2(&tot_ivc_q_sz, 32);
diff --git a/drivers/platform/tegra/dce/include/dce-ipc.h b/drivers/platform/tegra/dce/include/dce-ipc.h
index ae3ec0d6..c4a9dc30 100644
--- a/drivers/platform/tegra/dce/include/dce-ipc.h
+++ b/drivers/platform/tegra/dce/include/dce-ipc.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -32,7 +32,7 @@
  */
 #define DCE_DISPRM_CMD_MAX_NFRAMES	        1U
 #define DCE_DISPRM_CMD_MAX_FSIZE	        4096U
-#define DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_NFRAMES	1U
+#define DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_NFRAMES	4U
 #define DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_FSIZE	4096U
 #define DCE_ADMIN_CMD_MAX_FSIZE		        1024U