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gpu: host1x: Memory context stealing

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Currently, each process holding an open TegraDRM channel reserves
for itself one of the limited number of hardware memory contexts.
Attempting to allocate a channel when all contexts are in use
results in failure.

While we cannot have more contexts than the hardware supports in
active use, idle channels don't necessarily need to have a backing
memory context. As such, in this patch, we add another layer
to allow hardware memory contexts to be "stolen away" by channels
that are in active use, from idle processes.

The way this is implemented, is by keeping track of memory
mappings on each abstracted memory context. If we need to
steal that memory context's backing hardware context, we unmap
everything from it and give it away. When that abstracted
memory context is needed again (re-activated), we attempt
to allocate or steal another hardware context and re-map
the previously unmapped buffers.

Unfortunately, this means additional overhead and unpredictability
at submit time. Submit can fail if we cannot re-allocate a
backing memory context. Future work includes a provision for
un-stealable backing hardware memory contexts for processes
requiring more determinism, as well as optimization and cosmetic
improvements.

Bug 4403250
Bug 4399310

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I3d13e3476f1bff3c4757152254496cddaaafd76a
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3058905
Reviewed-by: Santosh BS <santoshb@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mikko Perttunen
2024-01-16 04:20:04 +02:00
committed by mobile promotions
parent 7e85d429e7
commit e062e9d49c
8 changed files with 318 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
drivers/gpu/drm/tegra/uapi.c
View File

@@ -17,7 +17,11 @@ static void tegra_drm_mapping_release(struct kref *ref)
struct tegra_drm_mapping *mapping =
container_of(ref, struct tegra_drm_mapping, ref);
host1x_bo_unpin(mapping->map);
if (mapping->ctx_map)
host1x_memory_context_unmap(mapping->ctx_map);
else
host1x_bo_unpin(mapping->bo_map);
host1x_bo_put(mapping->bo);
kfree(mapping);
@@ -33,12 +37,12 @@ static void tegra_drm_channel_context_close(struct tegra_drm_context *context)
struct tegra_drm_mapping *mapping;
unsigned long id;
if (context->memory_context)
host1x_memory_context_put(context->memory_context);
xa_for_each(&context->mappings, id, mapping)
tegra_drm_mapping_put(mapping);
if (context->memory_context)
host1x_memory_context_put(context->memory_context);
xa_destroy(&context->mappings);
host1x_channel_put(context->channel);
@@ -234,15 +238,26 @@ int tegra_drm_ioctl_channel_map(struct drm_device *drm, void *data, struct drm_f
goto put_gem;
}
mapping->map = host1x_bo_pin(tegra_drm_context_get_memory_device(context),
mapping->bo, direction, NULL);
if (IS_ERR(mapping->map)) {
err = PTR_ERR(mapping->map);
goto put_gem;
}
if (context->memory_context) {
mapping->ctx_map = host1x_memory_context_map(
context->memory_context, mapping->bo, direction);
mapping->iova = mapping->map->phys;
mapping->iova_end = mapping->iova + host1x_to_tegra_bo(mapping->bo)->gem.size;
if (IS_ERR(mapping->ctx_map)) {
err = PTR_ERR(mapping->ctx_map);
goto put_gem;
}
} else {
mapping->bo_map = host1x_bo_pin(context->client->base.dev,
mapping->bo, direction, NULL);
if (IS_ERR(mapping->bo_map)) {
err = PTR_ERR(mapping->bo_map);
goto put_gem;
}
mapping->iova = mapping->bo_map->phys;
mapping->iova_end = mapping->iova + host1x_to_tegra_bo(mapping->bo)->gem.size;
}
err = xa_alloc(&context->mappings, &args->mapping, mapping, XA_LIMIT(1, U32_MAX),
GFP_KERNEL);
@@ -254,7 +269,10 @@ int tegra_drm_ioctl_channel_map(struct drm_device *drm, void *data, struct drm_f
return 0;
unpin:
host1x_bo_unpin(mapping->map);
if (mapping->ctx_map)
host1x_memory_context_unmap(mapping->ctx_map);
else
host1x_bo_unpin(mapping->bo_map);
put_gem:
host1x_bo_put(mapping->bo);
free: