From e217a1da450d618ffa043d339dcd27e89083af10 Mon Sep 17 00:00:00 2001 From: Bhadram Varka Date: Thu, 17 Oct 2019 20:54:52 +0530 Subject: [PATCH] nvethernet: don't poll for Software reset in probe No need poll for SWR bit in DMA Basic Mode register for reading RO only registers after reset. Bug 2715328 Change-Id: Ib16c1d09386c00cdd98eadfb2fe6d9336d6de2b3 Signed-off-by: Bhadram Varka Reviewed-on: https://git-master.nvidia.com/r/2220296 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Srinivas Ramachandran GVS: Gerrit_Virtual_Submit Reviewed-by: Bitan Biswas Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/net/ethernet/nvidia/nvethernet/ether_linux.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c b/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c index 1b8906ef..adb2a017 100644 --- a/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c +++ b/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c @@ -2781,21 +2781,11 @@ static int ether_configure_car(struct platform_device *pdev, } } - ret = osi_poll_for_swr(osi_core); - if (ret < 0) { - dev_err(&pdev->dev, "failed to poll MAC Software reset\n"); - goto err_swr; - } - csr_clk_rate = clk_get_rate(pdata->axi_cbb_clk); osi_set_mdc_clk_rate(pdata->osi_core, csr_clk_rate); return ret; -err_swr: - if (pdata->mac_rst) { - reset_control_assert(pdata->mac_rst); - } err_rst: ether_disable_clks(pdata); err_enable_clks: