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scsi: ufs: Fix UFS CBB errors

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Fix UFS CBB errors by using the vendor register for
T234 instead of T194.

Bug 4089453

Change-Id: Ic54b2eea6822d459a6103d15eb60ff2d595fc256
Signed-off-by: Abhilash G <abhilashg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2906058
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Abhilash G
2023-05-17 13:30:33 +00:00
committed by mobile promotions
parent 9207ceb10a
commit e3e15a3cb1
1 changed files with 17 additions and 6 deletions
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23
drivers/scsi/ufs/ufs-tegra-common.c
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@@ -97,14 +97,19 @@ static int __ufs_tegra_mphy_receiver_calibration(
void __iomem *mphy_base)
{
struct device *dev = ufs_tegra->hba->dev;
u32 mphy_rx_vendor;
u32 mphy_rx_vendor, mphy_rx_vendor2_reg;
int timeout = 100;
mphy_update(mphy_base, MPHY_GO_BIT, MPHY_RX_APB_VENDOR2_0);
if (ufs_tegra->soc->chip_id == TEGRA234)
mphy_rx_vendor2_reg = MPHY_RX_APB_VENDOR2_0_T234;
else
mphy_rx_vendor2_reg = MPHY_RX_APB_VENDOR2_0;
mphy_update(mphy_base, MPHY_GO_BIT, mphy_rx_vendor2_reg);
while (timeout--) {
udelay(1);
mphy_rx_vendor = mphy_readl(mphy_base, MPHY_RX_APB_VENDOR2_0);
mphy_rx_vendor = mphy_readl(mphy_base, mphy_rx_vendor2_reg);
if (mphy_rx_vendor & MPHY_RX_APB_VENDOR2_0_RX_CAL_DONE) {
dev_info(dev, "MPhy Receiver Calibration passed\n");
return 0;
@@ -129,18 +134,24 @@ static int ufs_tegra_mphy_receiver_calibration(struct ufs_tegra_host *ufs_tegra,
void __iomem *mphy_base)
{
int err = 0;
u32 mphy_rx_vendor2_reg;
if (!ufs_tegra->enable_mphy_rx_calib)
if (ufs_tegra->enable_mphy_rx_calib)
return 0;
if (ufs_tegra->soc->chip_id == TEGRA234)
mphy_rx_vendor2_reg = MPHY_RX_APB_VENDOR2_0_T234;
else
mphy_rx_vendor2_reg = MPHY_RX_APB_VENDOR2_0;
mphy_update(mphy_base, MPHY_RX_APB_VENDOR2_0_RX_CAL_EN,
MPHY_RX_APB_VENDOR2_0);
mphy_rx_vendor2_reg);
err = __ufs_tegra_mphy_receiver_calibration(ufs_tegra, mphy_base);
if (err)
return err;
mphy_clear_bits(mphy_base, MPHY_RX_APB_VENDOR2_0_RX_CAL_EN,
MPHY_RX_APB_VENDOR2_0);
mphy_rx_vendor2_reg);
err = __ufs_tegra_mphy_receiver_calibration(ufs_tegra, mphy_base);
return err;