From e6f189141df4aa3fa40d0c96b0e6e91aad4fb62d Mon Sep 17 00:00:00 2001
From: Prathamesh Shete <pshete@nvidia.com>
Date: Tue, 8 Nov 2022 15:59:56 +0530
Subject: [PATCH] nvidia-oot: dts: add DT node for SDMMC1  instance

Add and enable SDMMC1 DT node for T234

Change-Id: Ib8be4fd8b7f0cad1d6f0fb69e86b443e3c1d470b
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2805053
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
---
 .../boot/dts/nvidia/tegra234-soc-overlay.dtsi | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-soc-overlay.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-soc-overlay.dtsi
index eaffd438..d1b13942 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-soc-overlay.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-soc-overlay.dtsi
@@ -142,6 +142,48 @@
 				status = "okay";
 			};
 
+			mmc@3400000 {
+				compatible = "nvidia,tegra194-sdhci", "nvidia,tegra234-sdhci";
+				reg = <0x03400000 0x20000>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
+					 <&bpmp TEGRA234_CLK_SDMMC_LEGACY_TM>;
+				clock-names = "sdhci", "tmclk";
+				assigned-clocks = <&bpmp TEGRA234_CLK_SDMMC1>,
+						 <&bpmp TEGRA234_CLK_PLLC4_MUXED>;
+				assigned-clock-parents =
+							<&bpmp TEGRA234_CLK_PLLC4_MUXED>,
+							<&bpmp TEGRA234_CLK_PLLC4_VCO_DIV2>;
+				resets = <&bpmp TEGRA234_RESET_SDMMC1>;
+				reset-names = "sdhci";
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_SDMMCRA &emc>,
+				<&mc TEGRA234_MEMORY_CLIENT_SDMMCWA &emc>;
+				interconnect-names = "dma-mem", "write";
+				iommus = <&smmu_niso1 TEGRA234_SID_SDMMC1A>;
+				pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+				pinctrl-0 = <&sdmmc1_3v3>;
+				pinctrl-1 = <&sdmmc1_1v8>;
+				nvidia,pad-autocal-pull-up-offset-3v3-timeout =
+										<0x07>;
+				nvidia,pad-autocal-pull-down-offset-3v3-timeout =
+										<0x07>;
+				nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x06>;
+				nvidia,pad-autocal-pull-down-offset-1v8-timeout =
+										<0x07>;
+				nvidia,pad-autocal-pull-up-offset-sdr104 = <0x00>;
+				nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
+				nvidia,default-tap = <14>;
+				nvidia,default-trim = <0x8>;
+				sd-uhs-sdr25;
+				sd-uhs-sdr50;
+				sd-uhs-ddr50;
+				sd-uhs-sdr104;
+				bus-width = <4>;
+				cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
+				disable-wp;
+				status = "okay";
+			};
+
 			hda@3510000 {
 				iommus = <&smmu_niso0 TEGRA234_SID_HDA>;
 				status = "okay";
@@ -811,4 +853,29 @@
 			};
 		};
 	};
+
+	fragment-t234@9 {
+		target-path = "/bus@0/pmc@c360000";
+		__overlay__ {
+			sdmmc1_3v3: sdmmc1-3v3 {
+				pins = "sdmmc1-hv";
+				power-source = <1>;
+			};
+
+			sdmmc1_1v8: sdmmc1-1v8 {
+				pins = "sdmmc1-hv";
+				power-source = <0>;
+			};
+
+			sdmmc3_3v3: sdmmc3-3v3 {
+				pins = "sdmmc3-hv";
+				power-source = <1>;
+			};
+
+			sdmmc3_1v8: sdmmc3-1v8 {
+				pins = "sdmmc3-hv";
+				power-source = <0>;
+			};
+		};
+	};
 };