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drivers: Add GTE support
The CL adds GTE driver support in OOT. The driver is copied from nvidia directory in dev-main with below changes. - Added removable module support This driver as module is needed as per the oot development requirement. Bug 3583612 Change-Id: I2772078fb96e1b172e45befe643b4c7c569866d9 Signed-off-by: Dipen Patel <dipenp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2706260 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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Documentation/devicetree/bindings/tegra_gte/tegra-gte.yaml
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78
Documentation/devicetree/bindings/tegra_gte/tegra-gte.yaml
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/tegra_gte/tegra-gte.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra T194 GTE (Generic hardware Timestamping Engine) bindings
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maintainers:
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- Dipen Patel <dipenp@nvidia.com>
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description: |+
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GTE is a hardware block which monitors various events for the state change and
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timestamps them using TSC counter. Tegra implements LIC GTE and AON GTE
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instances. LIC GTE is used only to monitor LIC IRQ lines and AON GTE is used
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to monitor Always On domain GPIO lines.
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properties:
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compatible:
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enum:
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- nvidia,tegra194-gte-lic
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- nvidia,tegra194-gte-aon
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- nvidia,tegra234-gte-aon
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reg:
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maxItems: 1
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description: physical base address.
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interrupts:
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description:
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interrupt number
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nvidia,int-threshold:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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GTE device generates its interrupt based on this u32 FIFO threshold
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value. The recommended value is 1.
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minimum: 1
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maximum: 256
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nvidia,num-slices:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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GTE lines are arranged in 32 bit slice where each bit represents different
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line/signal that it can enable/configure for the timestamp. It is u32
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property and the value depends on the GTE instance in the chip. Tegra194
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LIC instance uses 11 slices while Tegra234 instance uses 17 slices to
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represent interrupts line from LIC. The AON-GPIO GTE instances for both
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Tegra194 and Tegra234 use 3 slices for the GPIO.
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enum: [3, 11, 17]
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required:
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- compatible
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- reg
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- interrupts
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- nvidia,num-slices
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additionalProperties: false
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examples:
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- |
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gte@3aa0000 {
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interrupts = <0x00 0x0b 0x04>;
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compatible = "nvidia,tegra194-gte-lic";
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nvidia,int-threshold = <0x01>;
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status = "okay";
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nvidia,num-slices = <0x11>;
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reg = <0x3aa0000 0x10000>;
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};
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gte@c1e0000 {
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interrupts = <0x00 0x0d 0x04>;
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compatible = "nvidia,tegra234-gte-aon";
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nvidia,int-threshold = <0x01>;
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status = "okay";
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nvidia,num-slices = <0x03>;
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reg = <0xc1e0000 0x10000>;
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};
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7
Documentation/ioctl/ioctl-number.txt
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Documentation/ioctl/ioctl-number.txt
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Ioctl Numbers
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21 February 2020
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Dipen Patel
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Code Seq#(hex) Include File Comments
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========================================================
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0xB5 00 linux/tegra-gte-ioctl.h
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