ASoC: tegra-alt: Discontinue APE SPDIF support

As there are no real usecase for SPDIF currently and lack of
clock support for SPDIF, discontinuing the spdif support.

Bug 200355251

Change-Id: I9734915715ec21aabbf999c08cea588cf2fcb08f
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1584289
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mohan Kumar
2017-10-24 11:05:09 +05:30
committed by Sameer Pujar
parent fae9c0a600
commit e9c51282bb
8 changed files with 6 additions and 170 deletions

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@@ -146,12 +146,6 @@ config SND_SOC_TEGRA210_IQC_ALT
help help
Say Y or M if you want to add support for Tegra210 IQC module. Say Y or M if you want to add support for Tegra210 IQC module.
config SND_SOC_TEGRA210_SPDIF_ALT
tristate "Tegra210 SPDIF driver"
depends on SND_SOC_TEGRA_ALT && SND_SOC_TEGRA_ALT_210
help
Say Y or M if you want to add support for Tegra210 SPDIF module.
config SND_SOC_TEGRA210_OPE_ALT config SND_SOC_TEGRA210_OPE_ALT
tristate "Tegra210 OPE driver" tristate "Tegra210 OPE driver"
depends on SND_SOC_TEGRA_ALT && SND_SOC_TEGRA_ALT_210 depends on SND_SOC_TEGRA_ALT && SND_SOC_TEGRA_ALT_210
@@ -188,7 +182,6 @@ config SND_SOC_TEGRA_T210REF_MOBILE_ALT
select SND_SOC_TEGRA210_AFC_ALT select SND_SOC_TEGRA210_AFC_ALT
select SND_SOC_TEGRA210_MVC_ALT select SND_SOC_TEGRA210_MVC_ALT
select SND_SOC_TEGRA210_OPE_ALT select SND_SOC_TEGRA210_OPE_ALT
select SND_SOC_TEGRA210_SPDIF_ALT
select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP
select SND_SOC_SPDIF select SND_SOC_SPDIF
select SND_SOC_RT5640 select SND_SOC_RT5640
@@ -214,7 +207,6 @@ config SND_SOC_TEGRA_T210REF_ALT
select SND_SOC_TEGRA210_AFC_ALT select SND_SOC_TEGRA210_AFC_ALT
select SND_SOC_TEGRA210_MVC_ALT select SND_SOC_TEGRA210_MVC_ALT
select SND_SOC_TEGRA210_OPE_ALT select SND_SOC_TEGRA210_OPE_ALT
select SND_SOC_TEGRA210_SPDIF_ALT
select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP
select SND_SOC_TEGRA_ASOC_HWDEP_ALT select SND_SOC_TEGRA_ASOC_HWDEP_ALT
select SND_SOC_SPDIF select SND_SOC_SPDIF
@@ -240,7 +232,6 @@ config SND_SOC_TEGRA_T186REF_ALT
select SND_SOC_TEGRA210_AFC_ALT select SND_SOC_TEGRA210_AFC_ALT
select SND_SOC_TEGRA210_MVC_ALT select SND_SOC_TEGRA210_MVC_ALT
select SND_SOC_TEGRA210_OPE_ALT select SND_SOC_TEGRA210_OPE_ALT
select SND_SOC_TEGRA210_SPDIF_ALT
select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP
select SND_SOC_TEGRA186_ASRC_ALT select SND_SOC_TEGRA186_ASRC_ALT
select SND_SOC_TEGRA186_ARAD_ALT select SND_SOC_TEGRA186_ARAD_ALT
@@ -269,7 +260,6 @@ config SND_SOC_TEGRA_T186REF_MOBILE_ALT
select SND_SOC_TEGRA210_AFC_ALT select SND_SOC_TEGRA210_AFC_ALT
select SND_SOC_TEGRA210_MVC_ALT select SND_SOC_TEGRA210_MVC_ALT
select SND_SOC_TEGRA210_OPE_ALT select SND_SOC_TEGRA210_OPE_ALT
select SND_SOC_TEGRA210_SPDIF_ALT
select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP select SND_SOC_TEGRA210_ADSP_ALT if TEGRA_NVADSP
select SND_SOC_TEGRA186_ASRC_ALT select SND_SOC_TEGRA186_ASRC_ALT
select SND_SOC_TEGRA186_ARAD_ALT select SND_SOC_TEGRA186_ARAD_ALT

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@@ -32,7 +32,6 @@ snd-soc-tegra210-alt-sfc-objs := tegra210_sfc_alt.o
snd-soc-tegra210-alt-afc-objs := tegra210_afc_alt.o snd-soc-tegra210-alt-afc-objs := tegra210_afc_alt.o
snd-soc-tegra210-alt-mvc-objs := tegra210_mvc_alt.o snd-soc-tegra210-alt-mvc-objs := tegra210_mvc_alt.o
snd-soc-tegra210-alt-iqc-objs := tegra210_iqc_alt.o snd-soc-tegra210-alt-iqc-objs := tegra210_iqc_alt.o
snd-soc-tegra210-alt-spdif-objs := tegra210_spdif_alt.o
snd-soc-tegra210-alt-adsp-objs := tegra210_adsp_alt.o snd-soc-tegra210-alt-adsp-objs := tegra210_adsp_alt.o
snd-soc-tegra186-alt-asrc-objs := tegra186_asrc_alt.o snd-soc-tegra186-alt-asrc-objs := tegra186_asrc_alt.o
snd-soc-tegra186-alt-arad-objs := tegra186_arad_alt.o snd-soc-tegra186-alt-arad-objs := tegra186_arad_alt.o
@@ -52,7 +51,6 @@ obj-$(CONFIG_SND_SOC_TEGRA210_SFC_ALT) += snd-soc-tegra210-alt-sfc.o
obj-$(CONFIG_SND_SOC_TEGRA210_AFC_ALT) += snd-soc-tegra210-alt-afc.o obj-$(CONFIG_SND_SOC_TEGRA210_AFC_ALT) += snd-soc-tegra210-alt-afc.o
obj-$(CONFIG_SND_SOC_TEGRA210_MVC_ALT) += snd-soc-tegra210-alt-mvc.o obj-$(CONFIG_SND_SOC_TEGRA210_MVC_ALT) += snd-soc-tegra210-alt-mvc.o
obj-$(CONFIG_SND_SOC_TEGRA210_IQC_ALT) += snd-soc-tegra210-alt-iqc.o obj-$(CONFIG_SND_SOC_TEGRA210_IQC_ALT) += snd-soc-tegra210-alt-iqc.o
obj-$(CONFIG_SND_SOC_TEGRA210_SPDIF_ALT) += snd-soc-tegra210-alt-spdif.o
obj-$(CONFIG_SND_SOC_TEGRA210_OPE_ALT) += snd-soc-tegra210-alt-ope.o obj-$(CONFIG_SND_SOC_TEGRA210_OPE_ALT) += snd-soc-tegra210-alt-ope.o
obj-$(CONFIG_SND_SOC_TEGRA210_ADSP_ALT) += snd-soc-tegra210-alt-adsp.o obj-$(CONFIG_SND_SOC_TEGRA210_ADSP_ALT) += snd-soc-tegra210-alt-adsp.o
obj-$(CONFIG_SND_SOC_TEGRA186_ARAD_ALT) += snd-soc-tegra186-alt-arad.o obj-$(CONFIG_SND_SOC_TEGRA186_ARAD_ALT) += snd-soc-tegra186-alt-arad.o

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@@ -135,12 +135,12 @@
#define TEGRA210_AHUBRAMCTL_CTRL_RAM_ADDR_SHIFT 0 #define TEGRA210_AHUBRAMCTL_CTRL_RAM_ADDR_SHIFT 0
#define TEGRA210_AHUBRAMCTL_CTRL_RAM_ADDR_MASK (0x1ff << TEGRA210_AHUBRAMCTL_CTRL_RAM_ADDR_SHIFT) #define TEGRA210_AHUBRAMCTL_CTRL_RAM_ADDR_MASK (0x1ff << TEGRA210_AHUBRAMCTL_CTRL_RAM_ADDR_SHIFT)
#define TEGRA210_NUM_DAIS 69 #define TEGRA210_NUM_DAIS 67
#define TEGRA210_NUM_MUX_WIDGETS 52 #define TEGRA210_NUM_MUX_WIDGETS 50
#define TEGRA210_NUM_MUX_INPUT 56 /* size of TEGRA210_ROUTES */ #define TEGRA210_NUM_MUX_INPUT 54 /* size of TEGRA210_ROUTES */
#define TEGRA186_NUM_DAIS 110 #define TEGRA186_NUM_DAIS 108
#define TEGRA186_NUM_MUX_WIDGETS 81 #define TEGRA186_NUM_MUX_WIDGETS 79
#define TEGRA186_NUM_MUX_INPUT 84 /* size of TEGRA_ROUTES + TEGRA186_ROUTES */ #define TEGRA186_NUM_MUX_INPUT 82 /* size of TEGRA_ROUTES + TEGRA186_ROUTES */
#define TEGRA210_MAX_REGISTER_ADDR (TEGRA210_XBAR_PART2_RX +\ #define TEGRA210_MAX_REGISTER_ADDR (TEGRA210_XBAR_PART2_RX +\
(TEGRA210_XBAR_RX_STRIDE * (TEGRA210_XBAR_AUDIO_RX_COUNT - 1))) (TEGRA210_XBAR_RX_STRIDE * (TEGRA210_XBAR_AUDIO_RX_COUNT - 1)))
@@ -197,7 +197,6 @@
#define T210_OPE1_BASE_ADDR 0x702d8000 #define T210_OPE1_BASE_ADDR 0x702d8000
#define T210_OPE2_BASE_ADDR 0x702d8400 #define T210_OPE2_BASE_ADDR 0x702d8400
#define T210_AMIXER1_BASE_ADDR 0x702dbb00 #define T210_AMIXER1_BASE_ADDR 0x702dbb00
#define T210_SPDIF1_BASE_ADDR 0x702d6000
/* T186 Modules Base address */ /* T186 Modules Base address */
#define T186_ADMAIF_BASE_ADDR 0x0290F000 #define T186_ADMAIF_BASE_ADDR 0x0290F000
@@ -235,7 +234,6 @@
#define T186_DMIC4_BASE_ADDR 0x02904300 #define T186_DMIC4_BASE_ADDR 0x02904300
#define T186_OPE1_BASE_ADDR 0x02908000 #define T186_OPE1_BASE_ADDR 0x02908000
#define T186_AMIXER1_BASE_ADDR 0x0290BB00 #define T186_AMIXER1_BASE_ADDR 0x0290BB00
#define T186_SPDIF1_BASE_ADDR 0x02906000
#define T186_ASRC1_BASE_ADDR 0x02910000 #define T186_ASRC1_BASE_ADDR 0x02910000
#define T186_ARAD1_BASE_ADDR 0x0290E400 #define T186_ARAD1_BASE_ADDR 0x0290E400
#define T186_DSPK1_BASE_ADDR 0x02905000 #define T186_DSPK1_BASE_ADDR 0x02905000

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@@ -149,7 +149,6 @@ enum tegra210_xbar_codec_conf {
TEGRA210_CODEC_DMIC1_CONF, TEGRA210_CODEC_DMIC1_CONF,
TEGRA210_CODEC_DMIC2_CONF, TEGRA210_CODEC_DMIC2_CONF,
TEGRA210_CODEC_DMIC3_CONF, TEGRA210_CODEC_DMIC3_CONF,
TEGRA210_CODEC_SPDIF_CONF,
TEGRA210_XBAR_CODEC_CONF, /* Total number of xbar codec conf */ TEGRA210_XBAR_CODEC_CONF, /* Total number of xbar codec conf */
}; };
@@ -349,7 +348,6 @@ enum tegra186_xbar_codec_conf {
TEGRA186_CODEC_DMIC2_CONF, TEGRA186_CODEC_DMIC2_CONF,
TEGRA186_CODEC_DMIC3_CONF, TEGRA186_CODEC_DMIC3_CONF,
TEGRA186_CODEC_DMIC4_CONF, TEGRA186_CODEC_DMIC4_CONF,
TEGRA186_CODEC_SPDIF_CONF,
TEGRA186_CODEC_DSPK1_CONF, TEGRA186_CODEC_DSPK1_CONF,
TEGRA186_CODEC_DSPK2_CONF, TEGRA186_CODEC_DSPK2_CONF,
TEGRA186_CODEC_ASRC1_CONF, TEGRA186_CODEC_ASRC1_CONF,

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@@ -290,7 +290,6 @@ static const struct snd_soc_dapm_widget tegra_machine_dapm_widgets[] = {
SND_SOC_DAPM_HP("m Headphone", NULL), SND_SOC_DAPM_HP("m Headphone", NULL),
SND_SOC_DAPM_HP("n Headphone", NULL), SND_SOC_DAPM_HP("n Headphone", NULL),
SND_SOC_DAPM_HP("o Headphone", NULL), SND_SOC_DAPM_HP("o Headphone", NULL),
SND_SOC_DAPM_HP("e Headphone", NULL),
SND_SOC_DAPM_HP("s Headphone", NULL), SND_SOC_DAPM_HP("s Headphone", NULL),
SND_SOC_DAPM_MIC("Int Mic", NULL), SND_SOC_DAPM_MIC("Int Mic", NULL),
@@ -304,7 +303,6 @@ static const struct snd_soc_dapm_widget tegra_machine_dapm_widgets[] = {
SND_SOC_DAPM_MIC("b Mic", NULL), SND_SOC_DAPM_MIC("b Mic", NULL),
SND_SOC_DAPM_MIC("c Mic", NULL), SND_SOC_DAPM_MIC("c Mic", NULL),
SND_SOC_DAPM_MIC("d Mic", NULL), SND_SOC_DAPM_MIC("d Mic", NULL),
SND_SOC_DAPM_MIC("e Mic", NULL),
SND_SOC_DAPM_MIC("s Mic", NULL), SND_SOC_DAPM_MIC("s Mic", NULL),
}; };
@@ -798,28 +796,6 @@ static int tegra_machine_dai_init(struct snd_soc_pcm_runtime *runtime,
} }
} }
rtd = snd_soc_get_pcm_runtime(card, "spdif-playback");
if (rtd && (clk_rate >= 32000)) {
dai_params =
(struct snd_soc_pcm_stream *)rtd->dai_link->params;
if (is_playback) {
err = snd_soc_dai_set_sysclk(rtd->cpu_dai, 0,
clk_rate, SND_SOC_CLOCK_OUT);
if (err < 0) {
dev_err(card->dev, "cpu_dai out clock not set\n");
return err;
}
} else {
err = snd_soc_dai_set_sysclk(rtd->cpu_dai, 0,
clk_rate, SND_SOC_CLOCK_IN);
if (err < 0) {
dev_err(card->dev, "cpu_dai in clock not set\n");
return err;
}
}
}
return 0; return 0;
} }

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@@ -179,7 +179,6 @@ static const int tegra186_arad_mux_value[] = {
12, 13, 14, 15, /* DMIC1~4 */ 12, 13, 14, 15, /* DMIC1~4 */
24, 25, /* DSPK1~2 */ 24, 25, /* DSPK1~2 */
26, 27, /* IQC1~2 */ 26, 27, /* IQC1~2 */
28, 29, 30, 31, /* SPDIF_RX1,2 & SPDIF_TX1,2 */
}; };
static const char * const tegra186_arad_mux_text[] = { static const char * const tegra186_arad_mux_text[] = {
@@ -198,10 +197,6 @@ static const char * const tegra186_arad_mux_text[] = {
"DSPK2", "DSPK2",
"IQC1", "IQC1",
"IQC2", "IQC2",
"SPDIF1_RX1",
"SPDIF1_RX2",
"SPDIF1_TX1",
"SPDIF1_TX2",
}; };
static int tegra186_arad_mux_get(struct snd_kcontrol *kcontrol, static int tegra186_arad_mux_get(struct snd_kcontrol *kcontrol,

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@@ -64,8 +64,6 @@ static struct snd_soc_dai_driver tegra210_xbar_dais[] = {
DAI(MIXER1-8), DAI(MIXER1-8),
DAI(MIXER1-9), DAI(MIXER1-9),
DAI(MIXER1-10), DAI(MIXER1-10),
DAI(SPDIF1-1),
DAI(SPDIF1-2),
DAI(AFC1), DAI(AFC1),
DAI(AFC2), DAI(AFC2),
DAI(AFC3), DAI(AFC3),
@@ -136,8 +134,6 @@ static struct snd_soc_dai_driver tegra186_xbar_dais[] = {
DAI(MIXER1-8), DAI(MIXER1-8),
DAI(MIXER1-9), DAI(MIXER1-9),
DAI(MIXER1-10), DAI(MIXER1-10),
DAI(SPDIF1-1),
DAI(SPDIF1-2),
DAI(AFC1), DAI(AFC1),
DAI(AFC2), DAI(AFC2),
DAI(AFC3), DAI(AFC3),
@@ -248,8 +244,6 @@ static const char * const tegra210_xbar_mux_texts[] = {
"MIXER1-5", "MIXER1-5",
"AMX1", "AMX1",
"AMX2", "AMX2",
"SPDIF1-1",
"SPDIF1-2",
"AFC1", "AFC1",
"AFC2", "AFC2",
"AFC3", "AFC3",
@@ -319,8 +313,6 @@ static const char * const tegra186_xbar_mux_texts[] = {
"AMX3", "AMX3",
"AMX4", "AMX4",
"ARAD1", "ARAD1",
"SPDIF1-1",
"SPDIF1-2",
"AFC1", "AFC1",
"AFC2", "AFC2",
"AFC3", "AFC3",
@@ -400,8 +392,6 @@ static const int tegra210_xbar_mux_values[] = {
MUX_VALUE(1, 4), MUX_VALUE(1, 4),
MUX_VALUE(1, 8), MUX_VALUE(1, 8),
MUX_VALUE(1, 9), MUX_VALUE(1, 9),
MUX_VALUE(1, 20),
MUX_VALUE(1, 21),
MUX_VALUE(1, 24), MUX_VALUE(1, 24),
MUX_VALUE(1, 25), MUX_VALUE(1, 25),
MUX_VALUE(1, 26), MUX_VALUE(1, 26),
@@ -472,8 +462,6 @@ static const int tegra186_xbar_mux_values[] = {
MUX_VALUE(1, 10), MUX_VALUE(1, 10),
MUX_VALUE(1, 11), MUX_VALUE(1, 11),
MUX_VALUE(1, 16), MUX_VALUE(1, 16),
MUX_VALUE(1, 20),
MUX_VALUE(1, 21),
MUX_VALUE(1, 24), MUX_VALUE(1, 24),
MUX_VALUE(1, 25), MUX_VALUE(1, 25),
MUX_VALUE(1, 26), MUX_VALUE(1, 26),
@@ -553,8 +541,6 @@ MUX_ENUM_CTRL_DECL(t210_mixer17_tx, 0x26);
MUX_ENUM_CTRL_DECL(t210_mixer18_tx, 0x27); MUX_ENUM_CTRL_DECL(t210_mixer18_tx, 0x27);
MUX_ENUM_CTRL_DECL(t210_mixer19_tx, 0x28); MUX_ENUM_CTRL_DECL(t210_mixer19_tx, 0x28);
MUX_ENUM_CTRL_DECL(t210_mixer110_tx, 0x29); MUX_ENUM_CTRL_DECL(t210_mixer110_tx, 0x29);
MUX_ENUM_CTRL_DECL(t210_spdif11_tx, 0x30);
MUX_ENUM_CTRL_DECL(t210_spdif12_tx, 0x31);
MUX_ENUM_CTRL_DECL(t210_afc1_tx, 0x34); MUX_ENUM_CTRL_DECL(t210_afc1_tx, 0x34);
MUX_ENUM_CTRL_DECL(t210_afc2_tx, 0x35); MUX_ENUM_CTRL_DECL(t210_afc2_tx, 0x35);
MUX_ENUM_CTRL_DECL(t210_afc3_tx, 0x36); MUX_ENUM_CTRL_DECL(t210_afc3_tx, 0x36);
@@ -607,8 +593,6 @@ MUX_ENUM_CTRL_DECL_186(t186_mixer17_tx, 0x26);
MUX_ENUM_CTRL_DECL_186(t186_mixer18_tx, 0x27); MUX_ENUM_CTRL_DECL_186(t186_mixer18_tx, 0x27);
MUX_ENUM_CTRL_DECL_186(t186_mixer19_tx, 0x28); MUX_ENUM_CTRL_DECL_186(t186_mixer19_tx, 0x28);
MUX_ENUM_CTRL_DECL_186(t186_mixer110_tx, 0x29); MUX_ENUM_CTRL_DECL_186(t186_mixer110_tx, 0x29);
MUX_ENUM_CTRL_DECL_186(t186_spdif11_tx, 0x34);
MUX_ENUM_CTRL_DECL_186(t186_spdif12_tx, 0x35);
MUX_ENUM_CTRL_DECL_186(t186_afc1_tx, 0x38); MUX_ENUM_CTRL_DECL_186(t186_afc1_tx, 0x38);
MUX_ENUM_CTRL_DECL_186(t186_afc2_tx, 0x39); MUX_ENUM_CTRL_DECL_186(t186_afc2_tx, 0x39);
MUX_ENUM_CTRL_DECL_186(t186_afc3_tx, 0x3a); MUX_ENUM_CTRL_DECL_186(t186_afc3_tx, 0x3a);
@@ -695,8 +679,6 @@ static const struct snd_soc_dapm_widget tegra210_xbar_widgets[] = {
WIDGETS("MIXER1-8", t210_mixer18_tx), WIDGETS("MIXER1-8", t210_mixer18_tx),
WIDGETS("MIXER1-9", t210_mixer19_tx), WIDGETS("MIXER1-9", t210_mixer19_tx),
WIDGETS("MIXER1-10", t210_mixer110_tx), WIDGETS("MIXER1-10", t210_mixer110_tx),
WIDGETS("SPDIF1-1", t210_spdif11_tx),
WIDGETS("SPDIF1-2", t210_spdif12_tx),
WIDGETS("AFC1", t210_afc1_tx), WIDGETS("AFC1", t210_afc1_tx),
WIDGETS("AFC2", t210_afc2_tx), WIDGETS("AFC2", t210_afc2_tx),
WIDGETS("AFC3", t210_afc3_tx), WIDGETS("AFC3", t210_afc3_tx),
@@ -767,8 +749,6 @@ static const struct snd_soc_dapm_widget tegra186_xbar_widgets[] = {
WIDGETS("MIXER1-8", t186_mixer18_tx), WIDGETS("MIXER1-8", t186_mixer18_tx),
WIDGETS("MIXER1-9", t186_mixer19_tx), WIDGETS("MIXER1-9", t186_mixer19_tx),
WIDGETS("MIXER1-10", t186_mixer110_tx), WIDGETS("MIXER1-10", t186_mixer110_tx),
WIDGETS("SPDIF1-1", t186_spdif11_tx),
WIDGETS("SPDIF1-2", t186_spdif12_tx),
WIDGETS("AFC1", t186_afc1_tx), WIDGETS("AFC1", t186_afc1_tx),
WIDGETS("AFC2", t186_afc2_tx), WIDGETS("AFC2", t186_afc2_tx),
WIDGETS("AFC3", t186_afc3_tx), WIDGETS("AFC3", t186_afc3_tx),
@@ -878,8 +858,6 @@ static const struct snd_soc_dapm_widget tegra186_xbar_widgets[] = {
{ name " Mux", "MIXER1-3", "MIXER1-3 RX" }, \ { name " Mux", "MIXER1-3", "MIXER1-3 RX" }, \
{ name " Mux", "MIXER1-4", "MIXER1-4 RX" }, \ { name " Mux", "MIXER1-4", "MIXER1-4 RX" }, \
{ name " Mux", "MIXER1-5", "MIXER1-5 RX" }, \ { name " Mux", "MIXER1-5", "MIXER1-5 RX" }, \
{ name " Mux", "SPDIF1-1", "SPDIF1-1 RX" }, \
{ name " Mux", "SPDIF1-2", "SPDIF1-2 RX" }, \
{ name " Mux", "AFC1", "AFC1 RX" }, \ { name " Mux", "AFC1", "AFC1 RX" }, \
{ name " Mux", "AFC2", "AFC2 RX" }, \ { name " Mux", "AFC2", "AFC2 RX" }, \
{ name " Mux", "AFC3", "AFC3 RX" }, \ { name " Mux", "AFC3", "AFC3 RX" }, \
@@ -983,8 +961,6 @@ static const struct snd_soc_dapm_route tegra210_xbar_routes[] = {
TEGRA210_ROUTES("MIXER1-8") TEGRA210_ROUTES("MIXER1-8")
TEGRA210_ROUTES("MIXER1-9") TEGRA210_ROUTES("MIXER1-9")
TEGRA210_ROUTES("MIXER1-10") TEGRA210_ROUTES("MIXER1-10")
TEGRA210_ROUTES("SPDIF1-1")
TEGRA210_ROUTES("SPDIF1-2")
TEGRA210_ROUTES("AFC1") TEGRA210_ROUTES("AFC1")
TEGRA210_ROUTES("AFC2") TEGRA210_ROUTES("AFC2")
TEGRA210_ROUTES("AFC3") TEGRA210_ROUTES("AFC3")
@@ -1055,8 +1031,6 @@ static const struct snd_soc_dapm_route tegra186_xbar_routes[] = {
TEGRA186_ROUTES("MIXER1-8") TEGRA186_ROUTES("MIXER1-8")
TEGRA186_ROUTES("MIXER1-9") TEGRA186_ROUTES("MIXER1-9")
TEGRA186_ROUTES("MIXER1-10") TEGRA186_ROUTES("MIXER1-10")
TEGRA186_ROUTES("SPDIF1-1")
TEGRA186_ROUTES("SPDIF1-2")
TEGRA186_ROUTES("AFC1") TEGRA186_ROUTES("AFC1")
TEGRA186_ROUTES("AFC2") TEGRA186_ROUTES("AFC2")
TEGRA186_ROUTES("AFC3") TEGRA186_ROUTES("AFC3")
@@ -1124,87 +1098,6 @@ static const struct snd_soc_dapm_route tegra186_xbar_routes[] = {
TEGRA186_ROUTES("ASRC1-7") TEGRA186_ROUTES("ASRC1-7")
TEGRA186_ROUTES("DSPK1") TEGRA186_ROUTES("DSPK1")
TEGRA186_ROUTES("DSPK2") TEGRA186_ROUTES("DSPK2")
TEGRA186_ROUTES("ADMAIF1")
TEGRA186_ROUTES("ADMAIF2")
TEGRA186_ROUTES("ADMAIF3")
TEGRA186_ROUTES("ADMAIF4")
TEGRA186_ROUTES("ADMAIF5")
TEGRA186_ROUTES("ADMAIF6")
TEGRA186_ROUTES("ADMAIF7")
TEGRA186_ROUTES("ADMAIF8")
TEGRA186_ROUTES("ADMAIF9")
TEGRA186_ROUTES("ADMAIF10")
TEGRA186_ROUTES("I2S1")
TEGRA186_ROUTES("I2S2")
TEGRA186_ROUTES("I2S3")
TEGRA186_ROUTES("I2S4")
TEGRA186_ROUTES("I2S5")
TEGRA186_ROUTES("SFC1")
TEGRA186_ROUTES("SFC2")
TEGRA186_ROUTES("SFC3")
TEGRA186_ROUTES("SFC4")
TEGRA186_ROUTES("MIXER1-1")
TEGRA186_ROUTES("MIXER1-2")
TEGRA186_ROUTES("MIXER1-3")
TEGRA186_ROUTES("MIXER1-4")
TEGRA186_ROUTES("MIXER1-5")
TEGRA186_ROUTES("MIXER1-6")
TEGRA186_ROUTES("MIXER1-7")
TEGRA186_ROUTES("MIXER1-8")
TEGRA186_ROUTES("MIXER1-9")
TEGRA186_ROUTES("MIXER1-10")
TEGRA186_ROUTES("SPDIF1-1")
TEGRA186_ROUTES("SPDIF1-2")
TEGRA186_ROUTES("AFC1")
TEGRA186_ROUTES("AFC2")
TEGRA186_ROUTES("AFC3")
TEGRA186_ROUTES("AFC4")
TEGRA186_ROUTES("AFC5")
TEGRA186_ROUTES("AFC6")
TEGRA186_ROUTES("OPE1")
TEGRA186_ROUTES("SPKPROT1")
TEGRA186_ROUTES("MVC1")
TEGRA186_ROUTES("MVC2")
TEGRA186_ROUTES("AMX1-1")
TEGRA186_ROUTES("AMX1-2")
TEGRA186_ROUTES("AMX1-3")
TEGRA186_ROUTES("AMX1-4")
TEGRA186_ROUTES("AMX2-1")
TEGRA186_ROUTES("AMX2-2")
TEGRA186_ROUTES("AMX2-3")
TEGRA186_ROUTES("AMX2-4")
TEGRA186_ROUTES("ADX1")
TEGRA186_ROUTES("ADX2")
TEGRA186_ROUTES("ADMAIF11")
TEGRA186_ROUTES("ADMAIF12")
TEGRA186_ROUTES("ADMAIF13")
TEGRA186_ROUTES("ADMAIF14")
TEGRA186_ROUTES("ADMAIF15")
TEGRA186_ROUTES("ADMAIF16")
TEGRA186_ROUTES("ADMAIF17")
TEGRA186_ROUTES("ADMAIF18")
TEGRA186_ROUTES("ADMAIF19")
TEGRA186_ROUTES("ADMAIF20")
TEGRA186_ROUTES("AMX3-1")
TEGRA186_ROUTES("AMX3-2")
TEGRA186_ROUTES("AMX3-3")
TEGRA186_ROUTES("AMX3-4")
TEGRA186_ROUTES("AMX4-1")
TEGRA186_ROUTES("AMX4-2")
TEGRA186_ROUTES("AMX4-3")
TEGRA186_ROUTES("AMX4-4")
TEGRA186_ROUTES("ADX3")
TEGRA186_ROUTES("ADX4")
TEGRA186_ROUTES("I2S6")
TEGRA186_ROUTES("ASRC1-1")
TEGRA186_ROUTES("ASRC1-2")
TEGRA186_ROUTES("ASRC1-3")
TEGRA186_ROUTES("ASRC1-4")
TEGRA186_ROUTES("ASRC1-5")
TEGRA186_ROUTES("ASRC1-6")
TEGRA186_ROUTES("ASRC1-7")
TEGRA186_ROUTES("DSPK1")
TEGRA186_ROUTES("DSPK2")
IN_OUT_ROUTES("DMIC4") IN_OUT_ROUTES("DMIC4")
IN_OUT_ROUTES("AMX3") IN_OUT_ROUTES("AMX3")
IN_OUT_ROUTES("AMX4") IN_OUT_ROUTES("AMX4")
@@ -1280,8 +1173,6 @@ static struct of_dev_auxdata tegra210_xbar_auxdata[] = {
"tegra210-ope.1", NULL), "tegra210-ope.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra210-amixer", T210_AMIXER1_BASE_ADDR, OF_DEV_AUXDATA("nvidia,tegra210-amixer", T210_AMIXER1_BASE_ADDR,
"tegra210-mixer", NULL), "tegra210-mixer", NULL),
OF_DEV_AUXDATA("nvidia,tegra210-spdif", T210_SPDIF1_BASE_ADDR,
"tegra210-spdif", NULL),
{} {}
}; };
@@ -1356,8 +1247,6 @@ static struct of_dev_auxdata tegra186_xbar_auxdata[] = {
"tegra210-ope.0", NULL), "tegra210-ope.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra210-amixer", T186_AMIXER1_BASE_ADDR, OF_DEV_AUXDATA("nvidia,tegra210-amixer", T186_AMIXER1_BASE_ADDR,
"tegra210-mixer", NULL), "tegra210-mixer", NULL),
OF_DEV_AUXDATA("nvidia,tegra210-spdif", T186_SPDIF1_BASE_ADDR,
"tegra210-spdif", NULL),
OF_DEV_AUXDATA("nvidia,tegra186-asrc", T186_ASRC1_BASE_ADDR, OF_DEV_AUXDATA("nvidia,tegra186-asrc", T186_ASRC1_BASE_ADDR,
"tegra186-asrc", NULL), "tegra186-asrc", NULL),
OF_DEV_AUXDATA("nvidia,tegra186-arad", T186_ARAD1_BASE_ADDR, OF_DEV_AUXDATA("nvidia,tegra186-arad", T186_ARAD1_BASE_ADDR,

View File

@@ -1185,10 +1185,6 @@ static struct snd_soc_codec_conf
.dev_name = "tegra210-dmic.2", .dev_name = "tegra210-dmic.2",
.name_prefix = "DMIC3", .name_prefix = "DMIC3",
}, },
[TEGRA210_CODEC_SPDIF_CONF] = {
.dev_name = "tegra210-spdif",
.name_prefix = "SPDIF",
},
}; };
static struct snd_soc_dai_link static struct snd_soc_dai_link
@@ -2967,10 +2963,6 @@ static struct snd_soc_codec_conf
.dev_name = "tegra210-dmic.3", .dev_name = "tegra210-dmic.3",
.name_prefix = "DMIC4", .name_prefix = "DMIC4",
}, },
[TEGRA186_CODEC_SPDIF_CONF] = {
.dev_name = "tegra210-spdif",
.name_prefix = "SPDIF",
},
[TEGRA186_CODEC_DSPK1_CONF] = { [TEGRA186_CODEC_DSPK1_CONF] = {
.dev_name = "tegra186-dspk.0", .dev_name = "tegra186-dspk.0",
.name_prefix = "DSPK1", .name_prefix = "DSPK1",