From ea4dfb33dc3e6b9731e3e95184956c990dc545f9 Mon Sep 17 00:00:00 2001 From: Praveen AC Date: Thu, 8 Feb 2024 07:05:07 +0000 Subject: [PATCH] media: i2c: ar0234: Fix dual hawk corruption - Fixes the frame corruption issue encountered when simultaneously streaming from two hawks via E3653 GMSL2 board - Route each serializer output to a different deserializer output CSI port instead of routing video data from both serializers to the same deserializer output port - Route data through two virtual channels for each of the two output ports instead of four virtual channels all through a single output port - Fix serdes programming comments Bug 4032165 Bug 3753423 JEC-286 Change-Id: I7b4e929e9f5330cc6eb0aa72646ce429a713df7a Signed-off-by: Praveen AC (cherry picked from commit e31d73fa20b9dc65a4fe2817621a5bf2a4338ebb) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3073819 Reviewed-by: Bibek Basu GVS: buildbot_gerritrpt --- drivers/media/i2c/ar0234_mode_tbls.h | 40 ++++++++++++++-------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/media/i2c/ar0234_mode_tbls.h b/drivers/media/i2c/ar0234_mode_tbls.h index b5f7daf1..0a7a679f 100644 --- a/drivers/media/i2c/ar0234_mode_tbls.h +++ b/drivers/media/i2c/ar0234_mode_tbls.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ -/* Copyright (c) 2018-2023, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved. */ +/* Copyright (c) 2018-2024, NVIDIA CORPORATION & AFFILIATES. All Rights Reserved. */ /* * ar0234_mode_tbls.h - ar0234 sensor mode tables */ @@ -62,7 +62,6 @@ static struct index_reg_8 ar0234_Double_Dser_Ser[] = { {0x52, 0x0003, 0xAE}, // Disable CC to link B {0x80, 0x0000, 0x84}, // Link A serializer address is 0x84 - {0x52, 0x0003, 0xAB}, // Disable CC to link A {0x80, 0x0000, 0x88}, // Link B serializer address is 0x88 {0x52, 0x0003, 0xAA}, // Enable CC to links A and B @@ -70,17 +69,17 @@ static struct index_reg_8 ar0234_Double_Dser_Ser[] = { {0x84, 0x0308, 0x7E}, // Pipe X pulls clock from port A, pipe Y from port B {0x84, 0x0311, 0x21}, // Pipe X pulls data from port A, pipe Y from port B {0x84, 0x0316, 0x6b}, // RAW10 to pipe Y - {0x84, 0x0314, 0x6b}, // RAW10 to pipe Y + {0x84, 0x0314, 0x6b}, // RAW10 to pipe X {0x88, 0x0002, 0x33}, // Enable pipes X and Y {0x88, 0x0308, 0x7E}, // Pipe X pulls clock from port A, pipe Y from port B {0x88, 0x0311, 0x21}, // Pipe X pulls data from port A, pipe Y from port B {0x88, 0x0316, 0x6b}, // RAW10 to pipe Y - {0x88, 0x0314, 0x6b}, // RAW10 to pipe Y - {0x52, 0x00F4, 0x0f}, // Enable pipe 0 + {0x88, 0x0314, 0x6b}, // RAW10 to pipe X + {0x52, 0x00F4, 0x0f}, // Enable pipes 0-3 in deserializer {0x52, 0x00F0, 0x10}, // Link A ID 0 to pipe 0 // Link A ID 1 to pipe 1 {0x52, 0x00F1, 0x54}, // Link B ID 0 to pipe 2 // Link B ID 1 to pipe 3 - {0x52, 0x08A0, 0x01}, // CSI output is 2x4 + {0x52, 0x08A0, 0x01}, // CSI output is 4x2 {0x52, 0x08A3, 0x44}, // Default 4x2 lane mapping {0x52, 0x08A4, 0x44}, // Default 4x2 lane mapping @@ -92,16 +91,16 @@ static struct index_reg_8 ar0234_Double_Dser_Ser[] = { {0x52, 0x1D00, 0xF4}, {0x52, 0x1E00, 0xF4}, - {0x52, 0x0415, 0x2E}, - {0x52, 0x0418, 0x2E}, // 1400Mbps - {0x52, 0x041B, 0x2E}, - {0x52, 0x041E, 0x2E}, + {0x52, 0x0415, 0x39}, + {0x52, 0x0418, 0x39}, // Date rate is 2500Mbps/lane on port D + {0x52, 0x041B, 0x39}, // Data rate is 2500Mbps/lane on port E + {0x52, 0x041E, 0x39}, {0x52, 0x1D00, 0xF5}, {0x52, 0x1E00, 0xF5}, {0x52, 0x090B, 0x07}, // Enable 3 mappings Pipe 0//video2 - {0x52, 0x092D, 0x15}, // All mappings to controller 1 (port A) + {0x52, 0x092D, 0x00}, // All mappings to controller 0 (port C) {0x52, 0x090D, 0x2B}, // Input RAW10, VC0 {0x52, 0x090E, 0x2B}, // Output RAW10, VC0 {0x52, 0x090F, 0x00}, // Input FS, VC0 @@ -110,7 +109,7 @@ static struct index_reg_8 ar0234_Double_Dser_Ser[] = { {0x52, 0x0912, 0x01}, // Output FE, VC0 {0x52, 0x094B, 0x07}, // Enable 3 mappings Pipe 1 //video3 - {0x52, 0x096D, 0x15}, // All mappings to controller 1 (port A) + {0x52, 0x096D, 0x00}, // All mappings to controller 0 (port C) {0x52, 0x094D, 0x2B}, // Input RAW10, VC0 {0x52, 0x094E, 0x6B}, // Output RAW10, VC1 {0x52, 0x094F, 0x00}, // Input FS, VC0 @@ -119,22 +118,23 @@ static struct index_reg_8 ar0234_Double_Dser_Ser[] = { {0x52, 0x0952, 0x41}, // Output FE, VC1 {0x52, 0x098B, 0x07}, // Enable 3 mappings Pipe 2 //video1 - {0x52, 0x09AD, 0x15}, // All mappings to controller 1 (port A) + {0x52, 0x09AD, 0x15}, // All mappings to controller 1 (port D) {0x52, 0x098D, 0x2B}, // Input RAW10, VC0 - {0x52, 0x098E, 0xaB}, // Output RAW10, VC2 + {0x52, 0x098E, 0x2B}, // Output RAW10, VC0 {0x52, 0x098F, 0x00}, // Input FS, VC0 - {0x52, 0x0990, 0x80}, // Output FS, VC2 + {0x52, 0x0990, 0x00}, // Output FS, VC0 {0x52, 0x0991, 0x01}, // Input FE, VC0 - {0x52, 0x0992, 0x81}, // Output FE, VC2 + {0x52, 0x0992, 0x01}, // Output FE, VC0 {0x52, 0x09CB, 0x07}, // Enable 3 mappings Pipe 3 //video0 - {0x52, 0x09ED, 0x15}, // All mappings to controller 1 (port A) + {0x52, 0x09ED, 0x15}, // All mappings to controller 1 (port D) {0x52, 0x09CD, 0x2B}, // Input RAW10, VC0 - {0x52, 0x09CE, 0xeB}, // Output RAW10, VC3 + {0x52, 0x09CE, 0x6B}, // Output RAW10, VC1 {0x52, 0x09CF, 0x00}, // Input FS, VC0 - {0x52, 0x09D0, 0xc0}, // Output FS, VC3 + {0x52, 0x09D0, 0x40}, // Output FS, VC1 {0x52, 0x09D1, 0x01}, // Input FE, VC0 - {0x52, 0x09D2, 0xc1}, // Output FE, VC3 + {0x52, 0x09D2, 0x41}, // Output FE, VC1 + {0x52, 0x08A2, 0xF0}, {0x84, 0x02be, 0x90}, // Enable sensor power down pin.