diff --git a/drivers/gpu/host1x/context.c b/drivers/gpu/host1x/context.c index aaef0bd6..dacaa026 100644 --- a/drivers/gpu/host1x/context.c +++ b/drivers/gpu/host1x/context.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2021-2024, NVIDIA Corporation. + * SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ #include @@ -57,6 +57,7 @@ int host1x_memory_context_list_init(struct host1x *host1x) ctx->dev.bus = &host1x_context_device_bus_type; ctx->dev.parent = host1x->dev; + ctx->dev.dma_parms = &ctx->dma_parms; dma_set_max_seg_size(&ctx->dev, UINT_MAX); err = device_add(&ctx->dev); diff --git a/drivers/gpu/host1x/context.h b/drivers/gpu/host1x/context.h index e2114cb4..1f734f0a 100644 --- a/drivers/gpu/host1x/context.h +++ b/drivers/gpu/host1x/context.h @@ -2,7 +2,7 @@ /* * Host1x context devices * - * Copyright (c) 2020, NVIDIA Corporation. + * SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ #ifndef __HOST1X_CONTEXT_H @@ -28,6 +28,7 @@ struct host1x_hw_memory_context { refcount_t ref; struct pid *owner; + struct device_dma_parameters dma_parms; struct device dev; u64 dma_mask; u32 stream_id;