From ee63b13b243b4ba755937d3ebf4142feddc7cebf Mon Sep 17 00:00:00 2001 From: Bhadram Varka Date: Mon, 17 May 2021 16:28:28 +0530 Subject: [PATCH] nvethernet: add EQOS monitoring Rx clks BPMP-FW exposes the following EQOS RX clocks: o eqos_rx_input [external input clock from EQOS pad] o eqos_rx [external input clock after RX clock gate] o eqos_rx_m [monitoring clock: virtual clock that controls RX clock FMON] o eqos_macsec_rx [external input clock after RX MACSEC clock gate (separate gate from RX gate)] To enable RX clock FMON - o Issue clk_set_rate on EQOS_RX_INPUT o Clk_enable for EQOS_RX_CLK and EQOS_RX_M Bug 3286707 Change-Id: Ifa1482bcd82bec0f0c90693e99382b0a86409164 Signed-off-by: Bhadram Varka Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2530476 Reviewed-by: Narayan Reddy Reviewed-by: Rakesh Goyal GVS: Gerrit_Virtual_Submit --- .../ethernet/nvidia/nvethernet/ether_linux.c | 44 +++++++++++++++++++ .../ethernet/nvidia/nvethernet/ether_linux.h | 7 +++ 2 files changed, 51 insertions(+) diff --git a/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c b/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c index a7c12d5e..607e2380 100644 --- a/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c +++ b/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c @@ -314,6 +314,10 @@ static void ether_disable_eqos_clks(struct ether_priv_data *pdata) clk_disable_unprepare(pdata->pllrefe_clk); } + if (!IS_ERR_OR_NULL(pdata->rx_m_clk)) { + clk_disable_unprepare(pdata->rx_m_clk); + } + pdata->clks_enable = false; } @@ -529,10 +533,21 @@ static int ether_enable_eqos_clks(struct ether_priv_data *pdata) } } + if (!IS_ERR_OR_NULL(pdata->rx_m_clk)) { + ret = clk_prepare_enable(pdata->rx_m_clk); + if (ret < 0) { + goto err_rx_m; + } + } + pdata->clks_enable = true; return 0; +err_rx_m: + if (!IS_ERR_OR_NULL(pdata->tx_clk)) { + clk_disable_unprepare(pdata->tx_clk); + } err_tx: if (!IS_ERR_OR_NULL(pdata->ptp_ref_clk)) { clk_disable_unprepare(pdata->ptp_ref_clk); @@ -4456,8 +4471,37 @@ static int ether_get_eqos_clks(struct ether_priv_data *pdata) goto err_tx; } + if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) { + pdata->rx_m_clk = devm_clk_get(dev, "eqos_rx_m"); + if (IS_ERR(pdata->rx_m_clk)) { + ret = PTR_ERR(pdata->rx_m_clk); + dev_err(dev, "failed to get eqos_rx_m clk\n"); + goto err_rx_m; + } + + pdata->rx_input_clk = devm_clk_get(dev, "eqos_rx_input"); + if (IS_ERR(pdata->rx_input_clk)) { + ret = PTR_ERR(pdata->rx_input_clk); + dev_err(dev, "failed to get eqos_rx_input clk\n"); + goto err_rx_input; + } + + /* Set default rate to 1G */ + clk_set_rate(pdata->rx_input_clk, + ETHER_RX_INPUT_CLK_RATE); + } else { + pdata->rx_m_clk = NULL; + pdata->rx_input_clk = NULL; + } + return 0; +err_rx_input: + if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) { + devm_clk_put(dev, pdata->rx_m_clk); +err_rx_m: + devm_clk_put(dev, pdata->tx_clk); + } err_tx: devm_clk_put(dev, pdata->ptp_ref_clk); err_ptp_ref: diff --git a/drivers/net/ethernet/nvidia/nvethernet/ether_linux.h b/drivers/net/ethernet/nvidia/nvethernet/ether_linux.h index 2dcbb09b..a3d9064d 100644 --- a/drivers/net/ethernet/nvidia/nvethernet/ether_linux.h +++ b/drivers/net/ethernet/nvidia/nvethernet/ether_linux.h @@ -99,6 +99,11 @@ */ #define ETHER_DFLT_PTP_CLK 312500000U +/** + * @brief Ethernet default Rx Input clock frequency + */ +#define ETHER_RX_INPUT_CLK_RATE 125000000U + /** * @addtogroup CONFIG Ethernet configuration error codes * @@ -358,6 +363,8 @@ struct ether_priv_data { struct clk *eee_pcs_clk; /** APP clock */ struct clk *app_clk; + /** MAC Rx input clk */ + struct clk *rx_input_clk; /** Pointer to PHY device tree node */ struct device_node *phy_node; /** Pointer to MDIO device tree node */