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ASoC: tegra: add adsp audio driver
Added ADSP audio driver support for tegra soc and tegra virt alt. Below are the changes made with respect to Kernel 5.10: - Removed the ADSP COMPR DAI links due to differences in compress DAI link registration in Android (ACK 6.6) which causes build issues. - Omitted the callback function for dumping ADMA registers, as the upstream ADMA driver does not support it. Bug 3910602 Bug 4635899 Change-Id: I63ea878ef2e9a960d127d02470e8048535878518 Signed-off-by: Dara Ramesh <dramesh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3132128 Reviewed-by: Sameer Pujar <spujar@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
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269
include/sound/tegra_nvfx.h
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269
include/sound/tegra_nvfx.h
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@@ -0,0 +1,269 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* tegra_nvfx.h - Shared NVFX interface between Tegra ADSP ALSA driver and
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* ADSP side user space code.
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*/
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#ifndef _TEGRA_NVFX_H_
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#define _TEGRA_NVFX_H_
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/**
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* variant_t
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*
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*/
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typedef union {
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uint64_t ptr;
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/* Standard C */
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void *pvoid;
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char *pchar;
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unsigned char *puchar;
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short *pshort;
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unsigned short *pushort;
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long *plong;
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unsigned long *pulong;
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int *pint;
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unsigned int *puint;
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float *pfloat;
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long long *pllong;
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unsigned long long *pullong;
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double *pdouble;
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/* stdint.h */
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int8_t *pint8;
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uint8_t *puint8;
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int16_t *pint16;
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uint16_t *puint16;
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int32_t *pint32;
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uint32_t *puint32;
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} variant_t;
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/* Memory can not be used for in-place transform */
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#define NVFX_MEM_READ_ACCESS 0x1
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/* Memory can only be written to */
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#define NVFX_MEM_WRITE_ACCESS 0x2
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/* Memory can read from or written to */
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#define NVFX_MEM_ALL_ACCESS \
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(NVFX_MEM_READ_ACCESS | NVFX_MEM_WRITE_ACCESS)
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/**
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* nvfx_process_state_t - Required shared process state
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*
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* @state Current process state (i.e. active, inactive, etc.)
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* @count Number invfx_t::process calls
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* @ts_last Timestamp of last invfx_t::process call
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* @time_total Time spent in all invfx_t::process calls
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* @time_high Highest time spent in all invfx_t::process calls
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* @time_low Lowest time spent in all invfx_t::process calls
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* @time_last Time spent in the last invfx_t::process calls
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* @period Actual scheduling period
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*
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*/
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typedef struct {
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int32_t state;
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uint32_t count;
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uint64_t ts_last;
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uint64_t time_total;
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uint32_t time_high;
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uint32_t time_low;
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uint32_t time_last;
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uint32_t period;
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} nvfx_process_state_t;
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/**
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* nvfx_pin_state_t - Required shared pin state
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*
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* @bytes Bytes consumed or produced
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* @frames Frames consumed or produced
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*
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*/
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typedef struct {
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uint64_t bytes;
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uint32_t frames;
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} nvfx_pin_state_t;
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/**
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* Pin counts
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*
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* @NVFX_MAX_INPUT_PINS The maximum number of input pins for an effect
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* @NVFX_MAX_OUTPUT_PINS The maximum number of output pins for an effect
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*/
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#define NVFX_MAX_INPUT_PINS 6
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#define NVFX_MAX_OUTPUT_PINS 2
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#define NVFX_MAX_RAW_DATA_WSIZE 1024
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/**
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* nvfx_shared_state_t - Required shared state information
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*
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* @process invfx_t::process related state
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* @input State of input pins
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* @output State of output pins
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*
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*/
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typedef struct {
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nvfx_process_state_t process;
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nvfx_pin_state_t input[NVFX_MAX_INPUT_PINS];
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nvfx_pin_state_t output[NVFX_MAX_OUTPUT_PINS];
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/* custom params */
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} nvfx_shared_state_t;
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/**
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* nvfx_call_params_t
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*
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* @NVFX_MAX_CALL_PARAMS_WSIZE Max size in int32s of unioned call parameters
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* @size Size of the call parameters
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* @method The index of the function to call
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* [custom params] Variable length buffer of parameters e.g.:
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* uint32_t custom_params[...]
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*/
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typedef struct {
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#define NVFX_MAX_CALL_PARAMS_WSIZE 128
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uint32_t size;
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uint32_t method;
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/* custom params */
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} nvfx_call_params_t;
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/**
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* Required FX Methods
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*
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* @nvfx_method_reset Resets FX to default state
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* @nvfx_method_set_state Sets the FX state
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* @nvfx_method_flush Flushes input and cached data buffers
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* to support seek operations
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*
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* @nvfx_method_external_start: Start of externally defined FX methods
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*
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*/
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enum {
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nvfx_method_reset = 0,
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nvfx_method_set_state,
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nvfx_method_flush,
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nvfx_method_read_params,
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nvfx_method_error_event,
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nvfx_method_set_apr_params,
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/*
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* CPU to ADSP : Used to indicate end of stream
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* ADSP to CPU : Used to notify that all input data is consumed
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*/
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nvfx_method_set_eos,
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nvfx_method_external_start = 65536,
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nvfx_method_force32 = 0x7fffffff
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};
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/**
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* nvfx_reset_params_t - Resets FX to default state
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*
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* @call nvfx_call_t parameters
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*
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*/
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typedef struct {
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nvfx_call_params_t call;
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} nvfx_reset_params_t;
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/**
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* nvfx_method_set_state - Required FX States
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*
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* @nvfx_state_inactive No processing except copying cached data
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* @nvfx_state_active Process cached and/or new input data
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*
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* @nvfx_state_external_start Start of externally defined FX States
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*
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*/
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enum {
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nvfx_state_inactive = 0,
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nvfx_state_active,
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nvfx_state_external_start = 65536,
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nvfx_state_force32 = 0x7fffffff
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};
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/**
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* nvfx_set_state_params_t - Sets the FX state
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*
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* @call nvfx_call_t parameters
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* @state State to set the FX
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*
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*/
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typedef struct {
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nvfx_call_params_t call;
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int32_t state;
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} nvfx_set_state_params_t;
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/**
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* nvfx_method_error_event - Required FX States
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*
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* @nvfx_event_no_error
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* @nvfx_event_error
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*
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*/
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enum {
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nvfx_event_no_error = 0,
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nvfx_event_error,
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};
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/**
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* nvfx_error_event_params_t - Sets the FX state
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*
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* @call nvfx_call_t parameters
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* @state State to set the FX
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*
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*/
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typedef struct {
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nvfx_call_params_t call;
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int32_t err;
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} nvfx_error_event_params_t;
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/**
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* nvfx_flush_params_t - Flushes input and cached data buffers to
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* support seek operations
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*
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* @call nvfx_call_t parameters
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*
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*/
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typedef struct {
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nvfx_call_params_t call;
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} nvfx_flush_params_t;
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/**
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* nvfx_req_call_params_t - Parameters for required call functions
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*
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*/
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typedef union {
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nvfx_call_params_t call;
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nvfx_reset_params_t reset;
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nvfx_set_state_params_t set_state;
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nvfx_flush_params_t flush;
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} nvfx_req_call_params_t;
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/**
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* FX Types
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*
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* @NVFX_TYPE_HARDWARE No software intervention (e.g. HW Module)
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* @NVFX_TYPE_IN_PORT Brings data in (e.g. Stream)
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* @NVFX_TYPE_OUT_PORT Returns data out (e.g. Stream, DMA)
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* @NVFX_TYPE_N_INPUT Requires n input buffers (e.g. Mix)
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* @NVFX_TYPE_N_OUTPUT Requires n output buffers (e.g. Splitter)
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* @NVFX_TYPE_IN_PLACE Supports in place processing (e.g. Volume)
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* @NVFX_TYPE_REFORMAT Reformats the data (e.g. Deycrypt, Decoder, SRC)
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* @NVFX_TYPE_MULTIPASS Multiple processing passes (e.g. AEC)
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* @NVFX_TYPE_NONLINEAR Non-linear processing (e.g. Reverb)
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*
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*/
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#define NVFX_TYPE_HARDWARE 0x1
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#define NVFX_TYPE_IN_PORT 0x2
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#define NVFX_TYPE_OUT_PORT 0x4
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#define NVFX_TYPE_N_INPUT 0x10
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#define NVFX_TYPE_N_OUTPUT 0x20
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#define NVFX_TYPE_IN_PLACE 0x40
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#define NVFX_TYPE_REFORMAT 0x80
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#define NVFX_TYPE_MULTIPASS 0x100
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#define NVFX_TYPE_NONLINEAR 0x200
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#endif /* #ifndef _TEGRA_NVFX_H_ */
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245
include/sound/tegra_nvfx_apm.h
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245
include/sound/tegra_nvfx_apm.h
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@@ -0,0 +1,245 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* tegra_nvfx_apm.h - Shared APM interface between Tegra ADSP ALSA driver and
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* ADSP side user space code.
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*/
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#ifndef _TEGRA_NVFX_APM_H_
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#define _TEGRA_NVFX_APM_H_
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#define NVFX_APM_CMD_QUEUE_WSIZE 2048
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/**
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* Pin types
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*
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* @NVFX_PIN_TYPE_INPUT Pin type for input pin
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* @NVFX_PIN_TYPE_OUTPUT Pin type for output pin
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*/
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#define NVFX_PIN_TYPE_INPUT 0
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#define NVFX_PIN_TYPE_OUTPUT 1
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/**
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* apm_mbx_cmd: commands exchanged using mailbox.
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*
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* @apm_cmd_none: no operation.
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* @apm_cmd_msg_ready message queue holds a new message.
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* @apm_cmd_raw_data_ready message queue holds a raw data message
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* @apm_cmd_msg_exit exit command
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*/
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enum apm_mbx_cmd {
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apm_cmd_none = 0,
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apm_cmd_msg_ready,
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apm_cmd_raw_data_ready,
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apm_cmd_msg_exit,
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};
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/**
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* APM methods
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*
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*/
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#define NVFX_APM_METHOD_ACK_BIT (1U << 31) /* Flag to request ACK */
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/* Input modes of APM
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* In PUSH mode, APM blocks if there is no input available. Usually
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* a continuous mode ADMA sends interrupt when input data is available.
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* In PULL mode, APM blocks only if there is no input available and
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* a input fetch request is pending. Usually a one shot mode ADMA
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* fetches input data when required and signals event to wake up APM.
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*/
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enum {
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NVFX_APM_INPUT_MODE_PUSH = 0,
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NVFX_APM_INPUT_MODE_PULL,
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NVFX_APM_INPUT_MODE_MAX = NVFX_APM_INPUT_MODE_PULL,
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};
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enum {
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/* NVFX APM params */
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nvfx_apm_method_fx_connect = nvfx_method_external_start,
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nvfx_apm_method_fx_remove_all,
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nvfx_apm_method_fx_set_param,
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nvfx_apm_method_set_io_buffer,
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nvfx_apm_method_set_notification_size,
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/*
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* CPU to ADSP : Used to indicate new write or read position
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* ADSP to CPU : Used to notify buffer position as per notification size
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*/
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nvfx_apm_method_set_position,
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/*
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* CPU to ADSP : Used to indicate end of stream
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* ADSP to CPU : Used to notify that all input data is consumed
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*/
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nvfx_apm_method_set_eos,
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nvfx_apm_method_set_priority,
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/* ADSP to CPU : To send acknowledgement */
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nvfx_apm_method_ack,
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nvfx_apm_method_raw_ack,
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/* CPU to ADSP : To set APM input mode */
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nvfx_apm_method_set_input_mode,
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nvfx_apm_method_write_data,
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nvfx_apm_method_read_data,
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/* ADSP to CPU : To report plugin error */
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nvfx_apm_method_fx_error_event,
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};
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/* For method nvfx_apm_method_set_io_buffer */
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typedef struct {
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nvfx_call_params_t call_params;
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uint32_t pin_type; /* NVFX_PIN_TYPE_INPUT or NVFX_PIN_TYPE_INPUT */
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uint32_t pin_id;
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variant_t addr;
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uint32_t size;
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uint32_t flags;
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} apm_io_buffer_params_t;
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/* For method nvfx_apm_method_set_position */
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typedef struct {
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nvfx_call_params_t call_params;
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uint32_t pin_type; /* NVFX_PIN_TYPE_INPUT or NVFX_PIN_TYPE_INPUT */
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uint32_t pin_id;
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uint32_t offset;
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} apm_position_params_t;
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/* For method nvfx_apm_method_set_notification_size */
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typedef struct {
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nvfx_call_params_t call_params;
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uint32_t pin_type; /* NVFX_PIN_TYPE_INPUT or NVFX_PIN_TYPE_INPUT */
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uint32_t pin_id;
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uint32_t size;
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} apm_notification_params_t;
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/* For nvfx_method_set_eos */
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typedef struct {
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nvfx_call_params_t call_params;
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} apm_eos_params_t;
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/* For nvfx_apm_method_set_priority */
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typedef struct {
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nvfx_call_params_t call_params;
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uint32_t priority;
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} apm_set_priority_params_t;
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/* For nvfx_apm_method_set_input_mode */
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typedef struct {
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nvfx_call_params_t call_params;
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uint32_t mode;
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} apm_set_input_mode_params_t;
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/* Module specific structures */
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typedef struct {
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nvfx_call_params_t call_params;
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variant_t plugin_src; /* source plugin pointer */
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int32_t pin_src; /* input pin id */
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variant_t plugin_dst; /* destination plugin pointer */
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int32_t pin_dst; /* destination pin id */
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} apm_fx_connect_params_t;
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typedef struct {
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nvfx_call_params_t call_params;
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variant_t plugin;
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} apm_fx_remove_params_t;
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typedef struct {
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nvfx_call_params_t call_params;
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variant_t plugin; /* pointer to plugin_t */
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int32_t params[NVFX_MAX_CALL_PARAMS_WSIZE];
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} apm_fx_set_param_params_t;
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typedef struct {
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nvfx_call_params_t call_params;
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variant_t plugin; /* pointer to plugin_t */
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int32_t data[NVFX_MAX_RAW_DATA_WSIZE];
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int32_t size;
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} apm_fx_raw_data_params_t;
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typedef struct {
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nvfx_call_params_t call_params;
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variant_t plugin; /* pointer to plugin_t */
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uint32_t req_size;
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} apm_fx_read_request_params_t;
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typedef struct {
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nvfx_call_params_t call_params;
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variant_t plugin; /* pointer to plugin_t */
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uint32_t err;
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uint32_t data[NVFX_MAX_CALL_PARAMS_WSIZE];
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} apm_fx_error_event_params_t;
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/* unified app message structure */
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#pragma pack(4)
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typedef union {
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msgq_message_t msgq_msg;
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struct {
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int32_t header[MSGQ_MESSAGE_HEADER_WSIZE];
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union {
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nvfx_call_params_t call_params;
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apm_io_buffer_params_t io_buffer_params;
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apm_position_params_t position_params;
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apm_notification_params_t notification_params;
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nvfx_set_state_params_t state_params;
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nvfx_reset_params_t reset_params;
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apm_eos_params_t eos_params;
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apm_set_priority_params_t priority_params;
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apm_set_input_mode_params_t input_mode_params;
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apm_fx_connect_params_t fx_connect_params;
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apm_fx_remove_params_t fx_remove_params;
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apm_fx_set_param_params_t fx_set_param_params;
|
||||
apm_fx_read_request_params_t fx_read_request_params;
|
||||
apm_fx_error_event_params_t fx_error_event_params;
|
||||
};
|
||||
} msg;
|
||||
} apm_msg_t;
|
||||
|
||||
typedef union {
|
||||
msgq_message_t msgq_msg;
|
||||
struct {
|
||||
int32_t header[MSGQ_MESSAGE_HEADER_WSIZE];
|
||||
union {
|
||||
nvfx_call_params_t call_params;
|
||||
apm_fx_raw_data_params_t fx_raw_data_params;
|
||||
};
|
||||
} msg;
|
||||
} apm_raw_data_msg_t;
|
||||
|
||||
/* app message queue */
|
||||
typedef union {
|
||||
msgq_t msgq;
|
||||
struct {
|
||||
int32_t header[MSGQ_HEADER_WSIZE];
|
||||
int32_t queue[NVFX_APM_CMD_QUEUE_WSIZE];
|
||||
} app_msgq;
|
||||
} apm_msgq_t;
|
||||
#pragma pack()
|
||||
|
||||
/**
|
||||
* APM state structure shared between ADSP & CPU
|
||||
*/
|
||||
typedef struct {
|
||||
nvfx_shared_state_t nvfx_shared_state;
|
||||
uint16_t mbox_id; /* mailbox for communication */
|
||||
apm_msgq_t msgq_recv;
|
||||
apm_msgq_t msgq_send;
|
||||
variant_t input_event; /* event_t pointer to signal input ready */
|
||||
variant_t output_event;/* event_t pointer to signal output needed */
|
||||
} apm_shared_state_t;
|
||||
|
||||
typedef struct {
|
||||
variant_t plugin;
|
||||
/* NVFX specific shared memory follows */
|
||||
} plugin_shared_mem_t;
|
||||
|
||||
/**
|
||||
* Defines for APM priority levels
|
||||
* 48 corresponds to HIGH_PRIORITY in LK.
|
||||
*/
|
||||
#define APM_PRIORITY_MAX (58)
|
||||
#define APM_PRIORITY_DEFAULT (48)
|
||||
|
||||
|
||||
#define PLUGIN_SHARED_MEM(x) ((plugin_shared_mem_t *)x)
|
||||
#define APM_SHARED_STATE(x) ((apm_shared_state_t *)(PLUGIN_SHARED_MEM(x) + 1))
|
||||
#define NVFX_SHARED_STATE(x) ((nvfx_shared_state_t *)(PLUGIN_SHARED_MEM(x) + 1))
|
||||
|
||||
#endif /* #ifndef _TEGRA_NVFX_APM_H_ */
|
||||
84
include/sound/tegra_nvfx_plugin.h
Normal file
84
include/sound/tegra_nvfx_plugin.h
Normal file
@@ -0,0 +1,84 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
*
|
||||
* tegra_nvfx_plugin.h - Shared NVFX interface for different plugins between
|
||||
* Tegra ADSP ALSA driver and ADSP side user space code.
|
||||
*/
|
||||
|
||||
#ifndef _TEGRA_NVFX_PLUGIN_H_
|
||||
#define _TEGRA_NVFX_PLUGIN_H_
|
||||
|
||||
/* Mode */
|
||||
#define ADMA_MODE_ONESHOT 1
|
||||
#define ADMA_MODE_CONTINUOUS 2
|
||||
#define ADMA_MODE_LINKED_LIST 4
|
||||
|
||||
/* Direction */
|
||||
#define ADMA_MEMORY_TO_MEMORY 1
|
||||
#define ADMA_AHUB_TO_MEMORY 2
|
||||
#define ADMA_MEMORY_TO_AHUB 4
|
||||
#define ADMA_AHUB_TO_AHUB 8
|
||||
|
||||
#define EAVB_RX_DMA 0
|
||||
#define EAVB_TX_DMA 1
|
||||
|
||||
/* EAVB DMA PLUGIN NAMES */
|
||||
#define EAVB_RX_PLUGIN "eavb_dma_rx"
|
||||
#define EAVB_TX_PLUGIN "eavb_dma_tx"
|
||||
|
||||
/* ADMA plugin related interface */
|
||||
enum {
|
||||
/* NVFX ADMA params */
|
||||
nvfx_adma_method_init = nvfx_method_external_start,
|
||||
nvfx_adma_method_get_position,
|
||||
nvfx_adma_set_custom_params,
|
||||
nvfx_adma_set_null_sink_mode,
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
nvfx_call_params_t call_params;
|
||||
int32_t adma_channel;
|
||||
int32_t mode;
|
||||
int32_t direction;
|
||||
int32_t ahub_channel;
|
||||
int32_t periods;
|
||||
uint32_t adma_ch_page;
|
||||
variant_t event;
|
||||
uint32_t burst_size;
|
||||
uint32_t intr_dur;
|
||||
} nvfx_adma_init_params_t;
|
||||
|
||||
typedef struct {
|
||||
nvfx_call_params_t nvfx_call_params;
|
||||
uint32_t is_enabled;
|
||||
uint32_t buffer;
|
||||
uint32_t offset;
|
||||
uint64_t bytes_transferred;
|
||||
} nvfx_adma_get_position_params_t;
|
||||
|
||||
typedef union {
|
||||
nvfx_req_call_params_t req_call;
|
||||
nvfx_adma_init_params_t init;
|
||||
nvfx_adma_get_position_params_t get_position;
|
||||
} nvfx_adma_req_call_params_t;
|
||||
|
||||
/* EAVB DMA plugin related interface */
|
||||
enum {
|
||||
/* NVFX EAVB DMA params */
|
||||
nvfx_eavbdma_method_init = nvfx_method_external_start,
|
||||
nvfx_eavbdma_method_get_position,
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
nvfx_call_params_t call_params;
|
||||
int32_t direction;
|
||||
variant_t event;
|
||||
} nvfx_eavbdma_init_params_t;
|
||||
|
||||
typedef union {
|
||||
nvfx_req_call_params_t req_call;
|
||||
nvfx_eavbdma_init_params_t init;
|
||||
} nvfx_eavbdma_req_call_params_t;
|
||||
|
||||
#endif /* #ifndef _TEGRA_NVFX_PLUGIN_H_ */
|
||||
@@ -1,5 +1,5 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
# Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved.
|
||||
# Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved.
|
||||
|
||||
GCOV_PROFILE := y
|
||||
|
||||
@@ -26,3 +26,6 @@ snd-soc-tegra210-virt-alt-admaif-objs := tegra210_virt_alt_admaif.o \
|
||||
snd-soc-tegra-virt-t210ref-pcm-objs := tegra_virt_ref_alt.o
|
||||
obj-m += snd-soc-tegra210-virt-alt-admaif.o
|
||||
obj-m += snd-soc-tegra-virt-t210ref-pcm.o
|
||||
|
||||
snd-soc-tegra210-virt-alt-adsp-objs := tegra210_adsp_virt_alt.o
|
||||
obj-m += snd-soc-tegra210-virt-alt-adsp.o
|
||||
|
||||
216
sound/soc/tegra-virt-alt/include/tegra210_adsp_virt_alt.h
Normal file
216
sound/soc/tegra-virt-alt/include/tegra210_adsp_virt_alt.h
Normal file
@@ -0,0 +1,216 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
*
|
||||
* tegra210_adsp_virt_alt.h - Tegra210 ADSP header
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __TEGRA210_ADSP_ALT_H__
|
||||
#define __TEGRA210_ADSP_ALT_H__
|
||||
|
||||
/* This enum is linked with tegra210_adsp_mux_texts array.*/
|
||||
/* Anything changed in enum define should be also reflected in text array */
|
||||
enum tegra210_adsp_virt_regs {
|
||||
TEGRA210_ADSP_NONE,
|
||||
|
||||
/* End-point virtual regs */
|
||||
TEGRA210_ADSP_FRONT_END1,
|
||||
TEGRA210_ADSP_FRONT_END2,
|
||||
TEGRA210_ADSP_FRONT_END3,
|
||||
TEGRA210_ADSP_FRONT_END4,
|
||||
TEGRA210_ADSP_FRONT_END5,
|
||||
TEGRA210_ADSP_FRONT_END6,
|
||||
TEGRA210_ADSP_FRONT_END7,
|
||||
TEGRA210_ADSP_FRONT_END8,
|
||||
TEGRA210_ADSP_FRONT_END9,
|
||||
TEGRA210_ADSP_FRONT_END10,
|
||||
TEGRA210_ADSP_FRONT_END11,
|
||||
TEGRA210_ADSP_FRONT_END12,
|
||||
TEGRA210_ADSP_FRONT_END13,
|
||||
TEGRA210_ADSP_FRONT_END14,
|
||||
TEGRA210_ADSP_FRONT_END15,
|
||||
|
||||
TEGRA210_ADSP_EAVB,
|
||||
|
||||
TEGRA210_ADSP_ADMAIF1,
|
||||
TEGRA210_ADSP_ADMAIF2,
|
||||
TEGRA210_ADSP_ADMAIF3,
|
||||
TEGRA210_ADSP_ADMAIF4,
|
||||
TEGRA210_ADSP_ADMAIF5,
|
||||
TEGRA210_ADSP_ADMAIF6,
|
||||
TEGRA210_ADSP_ADMAIF7,
|
||||
TEGRA210_ADSP_ADMAIF8,
|
||||
TEGRA210_ADSP_ADMAIF9,
|
||||
TEGRA210_ADSP_ADMAIF10,
|
||||
TEGRA210_ADSP_ADMAIF11,
|
||||
TEGRA210_ADSP_ADMAIF12,
|
||||
TEGRA210_ADSP_ADMAIF13,
|
||||
TEGRA210_ADSP_ADMAIF14,
|
||||
TEGRA210_ADSP_ADMAIF15,
|
||||
TEGRA210_ADSP_ADMAIF16,
|
||||
TEGRA210_ADSP_ADMAIF17,
|
||||
TEGRA210_ADSP_ADMAIF18,
|
||||
TEGRA210_ADSP_ADMAIF19,
|
||||
TEGRA210_ADSP_ADMAIF20,
|
||||
|
||||
/* Virtual regs for apps */
|
||||
TEGRA210_ADSP_APM_IN1,
|
||||
TEGRA210_ADSP_APM_IN2,
|
||||
TEGRA210_ADSP_APM_IN3,
|
||||
TEGRA210_ADSP_APM_IN4,
|
||||
TEGRA210_ADSP_APM_IN5,
|
||||
TEGRA210_ADSP_APM_IN6,
|
||||
TEGRA210_ADSP_APM_IN7,
|
||||
TEGRA210_ADSP_APM_IN8,
|
||||
TEGRA210_ADSP_APM_IN9,
|
||||
TEGRA210_ADSP_APM_IN10,
|
||||
TEGRA210_ADSP_APM_IN11,
|
||||
TEGRA210_ADSP_APM_IN12,
|
||||
TEGRA210_ADSP_APM_IN13,
|
||||
TEGRA210_ADSP_APM_IN14,
|
||||
TEGRA210_ADSP_APM_IN15,
|
||||
|
||||
TEGRA210_ADSP_APM_OUT1,
|
||||
TEGRA210_ADSP_APM_OUT2,
|
||||
TEGRA210_ADSP_APM_OUT3,
|
||||
TEGRA210_ADSP_APM_OUT4,
|
||||
TEGRA210_ADSP_APM_OUT5,
|
||||
TEGRA210_ADSP_APM_OUT6,
|
||||
TEGRA210_ADSP_APM_OUT7,
|
||||
TEGRA210_ADSP_APM_OUT8,
|
||||
TEGRA210_ADSP_APM_OUT9,
|
||||
TEGRA210_ADSP_APM_OUT10,
|
||||
TEGRA210_ADSP_APM_OUT11,
|
||||
TEGRA210_ADSP_APM_OUT12,
|
||||
TEGRA210_ADSP_APM_OUT13,
|
||||
TEGRA210_ADSP_APM_OUT14,
|
||||
TEGRA210_ADSP_APM_OUT15,
|
||||
|
||||
TEGRA210_ADSP_PLUGIN_ADMA1,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA2,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA3,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA4,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA5,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA6,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA7,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA8,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA9,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA10,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA11,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA12,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA13,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA14,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA15,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA1_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA2_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA3_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA4_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA5_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA6_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA7_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA8_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA9_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA10_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA11_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA12_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA13_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA14_TX,
|
||||
TEGRA210_ADSP_PLUGIN_ADMA15_TX,
|
||||
|
||||
TEGRA210_ADSP_PLUGIN1,
|
||||
TEGRA210_ADSP_PLUGIN2,
|
||||
TEGRA210_ADSP_PLUGIN3,
|
||||
TEGRA210_ADSP_PLUGIN4,
|
||||
TEGRA210_ADSP_PLUGIN5,
|
||||
TEGRA210_ADSP_PLUGIN6,
|
||||
TEGRA210_ADSP_PLUGIN7,
|
||||
TEGRA210_ADSP_PLUGIN8,
|
||||
TEGRA210_ADSP_PLUGIN9,
|
||||
TEGRA210_ADSP_PLUGIN10,
|
||||
TEGRA210_ADSP_PLUGIN11,
|
||||
TEGRA210_ADSP_PLUGIN12,
|
||||
TEGRA210_ADSP_PLUGIN13,
|
||||
TEGRA210_ADSP_PLUGIN14,
|
||||
TEGRA210_ADSP_PLUGIN15,
|
||||
TEGRA210_ADSP_PLUGIN16,
|
||||
TEGRA210_ADSP_PLUGIN17,
|
||||
TEGRA210_ADSP_PLUGIN18,
|
||||
TEGRA210_ADSP_PLUGIN19,
|
||||
TEGRA210_ADSP_PLUGIN20,
|
||||
|
||||
TEGRA210_ADSP_VIRT_REG_MAX,
|
||||
};
|
||||
|
||||
/* Supports widget id 0x0 - 0xFF */
|
||||
#define TEGRA210_ADSP_WIDGET_SOURCE_SHIFT 0
|
||||
#define TEGRA210_ADSP_WIDGET_SOURCE_MASK (0xff << \
|
||||
TEGRA210_ADSP_WIDGET_SOURCE_SHIFT)
|
||||
|
||||
#define TEGRA210_ADSP_WIDGET_EN_SHIFT 31
|
||||
#define TEGRA210_ADSP_WIDGET_EN_MASK (0x1 << \
|
||||
TEGRA210_ADSP_WIDGET_EN_SHIFT)
|
||||
|
||||
/* TODO : Check if we can remove these macros */
|
||||
#define ADSP_FE_START TEGRA210_ADSP_FRONT_END1
|
||||
#define ADSP_FE_END TEGRA210_ADSP_FRONT_END15
|
||||
#define ADSP_ADMAIF_START TEGRA210_ADSP_ADMAIF1
|
||||
#define ADSP_ADMAIF_END TEGRA210_ADSP_ADMAIF20
|
||||
#define ADSP_EAVB_START TEGRA210_ADSP_EAVB
|
||||
#define ADSP_FE_COUNT ADSP_EAVB_START
|
||||
#define APM_IN_START TEGRA210_ADSP_APM_IN1
|
||||
#define APM_IN_END TEGRA210_ADSP_APM_IN15
|
||||
#define APM_OUT_START TEGRA210_ADSP_APM_OUT1
|
||||
#define APM_OUT_END TEGRA210_ADSP_APM_OUT15
|
||||
#define ADMA_START TEGRA210_ADSP_PLUGIN_ADMA1
|
||||
#define ADMA_END TEGRA210_ADSP_PLUGIN_ADMA15
|
||||
#define ADMA_TX_START TEGRA210_ADSP_PLUGIN_ADMA1_TX
|
||||
#define ADMA_TX_END TEGRA210_ADSP_PLUGIN_ADMA15_TX
|
||||
#define PLUGIN_START TEGRA210_ADSP_PLUGIN1
|
||||
#define PLUGIN_END TEGRA210_ADSP_PLUGIN20
|
||||
#define PLUGIN_NUM ((PLUGIN_END - PLUGIN_START) + 1)
|
||||
|
||||
#define IS_APM_IN(reg) ((reg >= APM_IN_START) && (reg <= APM_IN_END))
|
||||
#define IS_APM_OUT(reg) ((reg >= APM_OUT_START) && (reg <= APM_OUT_END))
|
||||
#define IS_APM(reg) (IS_APM_IN(reg) | IS_APM_OUT(reg))
|
||||
#define IS_PLUGIN(reg) ((reg >= PLUGIN_START) && (reg <= PLUGIN_END))
|
||||
#define IS_ADMA_RX(reg) ((reg >= ADMA_START) && (reg <= ADMA_END))
|
||||
#define IS_ADMA_TX(reg) ((reg >= ADMA_TX_START) && (reg <= ADMA_TX_END))
|
||||
#define IS_ADMA(reg) (IS_ADMA_RX(reg) || IS_ADMA_TX(reg))
|
||||
#define IS_ADSP_APP(reg) (IS_APM(reg) | IS_PLUGIN(reg) | IS_ADMA(reg))
|
||||
#define IS_ADSP_FE(reg) (((reg >= ADSP_FE_START) \
|
||||
&& (reg <= ADSP_FE_END)) || \
|
||||
(reg == ADSP_EAVB_START))
|
||||
#define IS_ADSP_ADMAIF(reg) ((reg >= ADSP_ADMAIF_START) \
|
||||
&& (reg <= ADSP_ADMAIF_END))
|
||||
|
||||
/* ADSP_MSG_FLAGs */
|
||||
#define TEGRA210_ADSP_MSG_FLAG_SEND 0x0
|
||||
#define TEGRA210_ADSP_MSG_FLAG_HOLD 0x1
|
||||
#define TEGRA210_ADSP_MSG_FLAG_NEED_ACK 0x2
|
||||
|
||||
/* TODO : Remove hard-coding and get data from DTS */
|
||||
#define TEGRA210_ADSP_ADMA_CHANNEL_START 10
|
||||
#define TEGRA210_ADSP_ADMA_CHANNEL_COUNT 10
|
||||
#define TEGRA210_ADSP_ADMA_BITMAP_COUNT 64
|
||||
#define TEGRA210_MAX_ADMA_CHANNEL 22
|
||||
#define TEGRA186_MAX_ADMA_CHANNEL 32
|
||||
|
||||
|
||||
#define TEGRA210_ADSP_ADMA_CHANNEL_START_HV 16
|
||||
|
||||
/* ADSP base index for widget name update */
|
||||
|
||||
#define TEGRA210_ADSP_ROUTE_BASE ((TEGRA210_ADSP_ADMAIF20 * 18) + \
|
||||
(15 * TEGRA210_ADSP_APM_OUT1))
|
||||
#define TEGRA210_ADSP_WIDGET_BASE \
|
||||
((TEGRA210_ADSP_ADMAIF20 * 3) + \
|
||||
(TEGRA210_ADSP_PLUGIN1 - TEGRA210_ADSP_APM_IN1) * 2)
|
||||
|
||||
#define IS_MMAP_ACCESS(access) \
|
||||
((access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) || \
|
||||
(access == SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED) || \
|
||||
(access == SNDRV_PCM_ACCESS_MMAP_COMPLEX))
|
||||
#endif
|
||||
|
||||
#define ADSP_BACKEND_TO_ADMAIF(be_reg) (be_reg - ADSP_ADMAIF_START)
|
||||
5362
sound/soc/tegra-virt-alt/tegra210_adsp_virt_alt.c
Normal file
5362
sound/soc/tegra-virt-alt/tegra210_adsp_virt_alt.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -6,6 +6,7 @@ snd-soc-tegra-utils-objs := tegra_asoc_utils.o tegra_asoc_machine.o \
|
||||
snd-soc-tegra210-afc-objs := tegra210_afc.o
|
||||
snd-soc-tegra210-iqc-objs := tegra210_iqc.o
|
||||
snd-soc-tegra186-arad-objs := tegra186_arad.o
|
||||
snd-soc-tegra210-adsp-objs := tegra210_adsp.o
|
||||
snd-soc-tegra-machine-driver-objs := tegra_machine_driver.o
|
||||
snd-soc-tegra-controls-objs := tegra_mixer_control.o
|
||||
|
||||
@@ -13,5 +14,6 @@ obj-m += snd-soc-tegra-utils.o
|
||||
obj-m += snd-soc-tegra210-afc.o
|
||||
obj-m += snd-soc-tegra210-iqc.o
|
||||
obj-m += snd-soc-tegra186-arad.o
|
||||
obj-m += snd-soc-tegra210-adsp.o
|
||||
obj-m += snd-soc-tegra-machine-driver.o
|
||||
obj-m += snd-soc-tegra-controls.o
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* tegra210_adsp.c - Tegra ADSP audio driver
|
||||
*
|
||||
* Author: Sumit Bhattacharya <sumitb@nvidia.com>
|
||||
* Copyright (c) 2014-2022 NVIDIA CORPORATION. All rights reserved.
|
||||
* Copyright (c) 2014-2024 NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
*/
|
||||
|
||||
@@ -13,7 +13,6 @@
|
||||
#include <linux/fs.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <../arch/arm/mach-tegra/iomap.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/delay.h>
|
||||
@@ -35,6 +34,7 @@
|
||||
#include <sound/pcm_params.h>
|
||||
#include <sound/soc.h>
|
||||
#include <soc/tegra/fuse.h>
|
||||
#include <soc/tegra/fuse-helper.h>
|
||||
#include <sound/compress_driver.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
#include <sound/tegra_nvfx.h>
|
||||
@@ -373,11 +373,6 @@ static void tegra210_adsp_deallocate_dma_buffer(struct snd_dma_buffer *buf)
|
||||
buf->addr = 0;
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_TEGRA210_ADMA)
|
||||
/* implemented in adma driver */
|
||||
void tegra_adma_dump_ch_reg(void);
|
||||
#endif
|
||||
|
||||
/* ADSP OS boot and init API */
|
||||
static int tegra210_adsp_init(struct tegra210_adsp *adsp)
|
||||
{
|
||||
@@ -411,10 +406,9 @@ static int tegra210_adsp_init(struct tegra210_adsp *adsp)
|
||||
}
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_TEGRA210_ADMA)
|
||||
/* set callback function for adsp to dump adma registers for debug */
|
||||
nvadsp_set_adma_dump_reg(&tegra_adma_dump_ch_reg);
|
||||
#endif
|
||||
/* TODO: set callback function for adsp to dump adma registers for debug
|
||||
* purpose, see more details in Bug 3798682
|
||||
*/
|
||||
|
||||
/* Suspend OS for now. Resume will happen via runtime pm calls */
|
||||
ret = nvadsp_os_suspend();
|
||||
@@ -2848,19 +2842,6 @@ static struct snd_soc_dai_ops tegra210_adsp_eavb_dai_ops = {
|
||||
}, \
|
||||
}
|
||||
|
||||
#define ADSP_COMPR_DAI(id) \
|
||||
{ \
|
||||
.name = "ADSP COMPR" #id, \
|
||||
.compress_new = snd_soc_new_compress, \
|
||||
.playback = { \
|
||||
.stream_name = "ADSP COMPR" #id " Receive", \
|
||||
.channels_min = 1, \
|
||||
.channels_max = 2, \
|
||||
.rates = SNDRV_PCM_RATE_8000_48000, \
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE, \
|
||||
}, \
|
||||
}
|
||||
|
||||
#define ADSP_EAVB_DAI() \
|
||||
{ \
|
||||
.name = "ADSP EAVB", \
|
||||
@@ -2999,8 +2980,6 @@ static struct snd_soc_dai_driver tegra210_adsp_cmpnt_dai[] = {
|
||||
ADSP_PCM_DAI(13),
|
||||
ADSP_PCM_DAI(14),
|
||||
ADSP_PCM_DAI(15),
|
||||
ADSP_COMPR_DAI(1),
|
||||
ADSP_COMPR_DAI(2),
|
||||
ADSP_EAVB_DAI(),
|
||||
};
|
||||
|
||||
@@ -4825,4 +4804,3 @@ MODULE_DESCRIPTION("Tegra210 ADSP Audio driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
MODULE_DEVICE_TABLE(of, tegra210_adsp_audio_of_match);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user