From ee8de73c70be25d0a4339b9c6ac582b074e86103 Mon Sep 17 00:00:00 2001 From: Hariharan Sivaraman Date: Fri, 21 Dec 2018 16:22:56 +0530 Subject: [PATCH] nvadsp: Clear HWBOX0 for ADSP guest reset handling During ADSP playback, if HWMBOX0 is high and guest reset is done, after reset ADSP is unable to communicate with kernel driver since the interrupt line remains High thereby not generating interrupt (edge triggered). Jira EMA-1178 Change-Id: Ifb1283c7286ed944f243e7d92dfe4db40bcd0ba2 Signed-off-by: Hariharan Sivaraman Reviewed-on: https://git-master.nvidia.com/r/1978017 Reviewed-by: Uday Gupta Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Dipesh Gandhi Reviewed-by: Sachin Nikam Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/platform/tegra/nvadsp/os-t18x.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/platform/tegra/nvadsp/os-t18x.c b/drivers/platform/tegra/nvadsp/os-t18x.c index c575331e..0d5e6919 100644 --- a/drivers/platform/tegra/nvadsp/os-t18x.c +++ b/drivers/platform/tegra/nvadsp/os-t18x.c @@ -87,6 +87,9 @@ int nvadsp_os_t18x_init(struct platform_device *pdev) /* Write to HWMBOX5 */ hwmbox_writel(val, drv_data->chip_data->hwmb.hwmbox5_reg); + /* Clear HWMBOX0 for ADSP Guest reset handling */ + hwmbox_writel(0, drv_data->chip_data->hwmb.hwmbox0_reg); + return 0; }