From f90d551e16220b8a6b8159188d8471d3c94b81e8 Mon Sep 17 00:00:00 2001 From: Viswanath L Date: Tue, 22 Feb 2022 07:16:02 +0000 Subject: [PATCH] drivers: nvadsp: Disable MBX empty intr at config MBOX empty interrupt line is high by default; configuring AGIC line in this state is undefined behaviour. Fix this by disabling the interrupt at source and enabling it only after unmasking in AGIC. Immediately upon unmasking one empty interrupt will be raised, which must be ignored. Bug 3432474 Change-Id: I03a26f061bb28b616626bb07153b0263540d7bd9 Signed-off-by: Viswanath L Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2672095 Reviewed-by: svcacv Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-cert Reviewed-by: svc_kernel_abi Reviewed-by: Dipesh Gandhi Reviewed-by: Sharad Gupta GVS: Gerrit_Virtual_Submit --- drivers/platform/tegra/nvadsp/dev.c | 1 + drivers/platform/tegra/nvadsp/dev.h | 1 + drivers/platform/tegra/nvadsp/hwmailbox.c | 10 +++++++++- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/platform/tegra/nvadsp/dev.c b/drivers/platform/tegra/nvadsp/dev.c index 53eac2db..fe5aecd2 100644 --- a/drivers/platform/tegra/nvadsp/dev.c +++ b/drivers/platform/tegra/nvadsp/dev.c @@ -572,6 +572,7 @@ static struct nvadsp_chipdata tegrat18x_adsp_chipdata = { .hwmbox5_reg = 0X28000, .hwmbox6_reg = 0X30000, .hwmbox7_reg = 0X38000, + .empty_int_ie = 0x8, }, .adsp_shared_mem_hwmbox = 0x18000, /* HWMBOX3 */ .adsp_thread_hwmbox = 0x20000, /* HWMBOX4 */ diff --git a/drivers/platform/tegra/nvadsp/dev.h b/drivers/platform/tegra/nvadsp/dev.h index 76adfb2c..f7254358 100644 --- a/drivers/platform/tegra/nvadsp/dev.h +++ b/drivers/platform/tegra/nvadsp/dev.h @@ -135,6 +135,7 @@ struct nvadsp_hwmb { u32 hwmbox5_reg; u32 hwmbox6_reg; u32 hwmbox7_reg; + u32 empty_int_ie; }; diff --git a/drivers/platform/tegra/nvadsp/hwmailbox.c b/drivers/platform/tegra/nvadsp/hwmailbox.c index 9ae54b8b..c6d90820 100644 --- a/drivers/platform/tegra/nvadsp/hwmailbox.c +++ b/drivers/platform/tegra/nvadsp/hwmailbox.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -188,6 +188,9 @@ static irqreturn_t hwmbox_send_empty_int_handler(int irq, void *devid) uint32_t data; int ret; + if (!is_hwmbox_busy) + return IRQ_HANDLED; + spin_lock_irqsave(lock, lockflags); data = hwmbox_readl(send_hwmbox()); @@ -283,6 +286,7 @@ int nvadsp_setup_hwmbox_interrupts(struct platform_device *pdev) { struct nvadsp_drv_data *drv = platform_get_drvdata(pdev); struct device *dev = &pdev->dev; + u32 empty_int_ie = drv->chip_data->hwmb.empty_int_ie; int recv_virq, send_virq; int ret; @@ -294,9 +298,13 @@ int nvadsp_setup_hwmbox_interrupts(struct platform_device *pdev) if (ret) goto err; + if (empty_int_ie) + hwmbox_writel(0x0, send_hwmbox() + empty_int_ie); ret = devm_request_irq(dev, send_virq, hwmbox_send_empty_int_handler, IRQF_TRIGGER_RISING, "hwmbox1_send_empty", pdev); + if (empty_int_ie) + hwmbox_writel(0x1, send_hwmbox() + empty_int_ie); if (ret) goto free_interrupts;