From fa20ae0dd6b43e9d478b781ed81ca90bec584ccc Mon Sep 17 00:00:00 2001 From: Aniket Bahadarpurkar Date: Fri, 12 May 2023 10:16:48 +0000 Subject: [PATCH] soc: tegra: Reduce number of mem areas Reduce number of memory areas for camrtc dbg tests for DRAM optimization Bug 3995285 Change-Id: Icc2250915ada202aee962c691d97f14ca861f31d Signed-off-by: Aniket Bahadarpurkar Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2902767 Reviewed-by: svcacv Reviewed-by: Pekka Pessi Reviewed-by: Semi Malinen Reviewed-by: Dipesh Gandhi Reviewed-by: Laxman Dewangan --- include/soc/tegra/camrtc-dbg-messages.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/soc/tegra/camrtc-dbg-messages.h b/include/soc/tegra/camrtc-dbg-messages.h index b5f29113..6112ecdf 100644 --- a/include/soc/tegra/camrtc-dbg-messages.h +++ b/include/soc/tegra/camrtc-dbg-messages.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ #ifndef INCLUDE_CAMRTC_DBG_MESSAGES_H @@ -183,7 +183,7 @@ struct camrtc_dbg_run_test_data { }; /* Number of memory areas */ -#define CAMRTC_DBG_NUM_MEM_TEST_MEM MK_U32(8) +#define CAMRTC_DBG_NUM_MEM_TEST_MEM MK_U32(4) #define CAMRTC_DBG_MAX_MEM_TEST_DATA (\ CAMRTC_DBG_MAX_DATA \