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gpu: host1x: Add actmon registration interface
Provide the actmon registration interface for host1x clients. The registration process will create the debugfs for the actmon associated with the host1x client, and initialize the actmon registers. Bug 3788919 Signed-off-by: Johnny Liu <johnliu@nvidia.com> Change-Id: I313bf52a5eda1663e26c2579788a873ca4081459 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2886696 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Johnny Liu
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mobile promotions
parent
d99906cfaa
commit
fa8cf02e87
@@ -1,11 +1,412 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Tegra host1x activity monitor interfaes
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* Tegra host1x activity monitor interfaces
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*
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* Copyright (c) 2023, NVIDIA Corporation.
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* Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/host1x-next.h>
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#include "dev.h"
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#include "actmon.h"
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#include "hw/actmon.h"
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static void actmon_writel(struct host1x_actmon *actmon, u32 val, u32 offset)
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{
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writel(val, actmon->regs+offset);
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}
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static u32 actmon_readl(struct host1x_actmon *actmon, u32 offset)
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{
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return readl(actmon->regs+offset);
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}
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static void actmon_module_writel(struct host1x_actmon_module *module, u32 val, u32 offset)
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{
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writel(val, module->regs+offset);
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}
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static u32 actmon_module_readl(struct host1x_actmon_module *module, u32 offset)
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{
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return readl(module->regs+offset);
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}
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static void host1x_actmon_update_sample_period(struct host1x_actmon *actmon)
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{
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unsigned long actmon_mhz;
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u32 actmon_clks_per_sample, sample_period, val = 0;
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actmon_mhz = actmon->rate / 1000000;
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actmon_clks_per_sample = actmon_mhz * actmon->usecs_per_sample;
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val |= HOST1X_ACTMON_CTRL_SOURCE(2);
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if (actmon_clks_per_sample > 65536) {
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val |= HOST1X_ACTMON_CTRL_SAMPLE_TICK(1);
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sample_period = actmon_clks_per_sample / 65536;
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} else {
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val &= ~HOST1X_ACTMON_CTRL_SAMPLE_TICK(1);
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sample_period = actmon_clks_per_sample / 256;
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}
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val &= ~HOST1X_ACTMON_CTRL_SAMPLE_PERIOD_MASK;
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val |= HOST1X_ACTMON_CTRL_SAMPLE_PERIOD(sample_period);
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actmon_writel(actmon, val, HOST1X_ACTMON_CTRL_REG);
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}
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static int host1x_actmon_sample_period_get(void *data, u64 *val)
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{
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struct host1x_actmon *actmon = (struct host1x_actmon *)data;
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*val = (u64) actmon->usecs_per_sample;
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return 0;
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}
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static int host1x_actmon_sample_period_set(void *data, u64 val)
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{
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struct host1x_actmon *actmon = (struct host1x_actmon *)data;
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actmon->usecs_per_sample = (u32)val;
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host1x_actmon_update_sample_period(actmon);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(host1x_actmon_sample_period_fops,
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host1x_actmon_sample_period_get,
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host1x_actmon_sample_period_set,
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"%lld\n");
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static void host1x_actmon_debug_init(struct host1x_actmon *actmon)
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{
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struct host1x *host = dev_get_drvdata(actmon->client->host->parent);
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struct dentry *debugfs = host->actmon_debugfs;
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if (!debugfs)
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return;
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actmon->debugfs = debugfs_create_dir(actmon->name, debugfs);
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/* R/W files */
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debugfs_create_file("sample_period", 0644, actmon->debugfs, actmon,
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&host1x_actmon_sample_period_fops);
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}
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static int host1x_actmon_module_k_get(void *data, u64 *val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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*val = (u64) module->k;
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return 0;
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}
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static int host1x_actmon_module_k_set(void *data, u64 val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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u32 val32;
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module->k = (u32)val;
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val32 = actmon_module_readl(module, HOST1X_ACTMON_MODULE_CTRL_REG);
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val32 &= ~HOST1X_ACTMON_MODULE_CTRL_K_VAL_MASK;
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val32 |= HOST1X_ACTMON_MODULE_CTRL_K_VAL(module->k);
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actmon_module_writel(module, val32, HOST1X_ACTMON_MODULE_CTRL_REG);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(host1x_actmon_module_k_fops,
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host1x_actmon_module_k_get,
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host1x_actmon_module_k_set,
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"%lld\n");
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static int host1x_actmon_module_consec_upper_num_get(void *data, u64 *val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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*val = (u64) module->consec_upper_num;
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return 0;
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}
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static int host1x_actmon_module_consec_upper_num_set(void *data, u64 val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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u32 val32;
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module->consec_upper_num = (u32)val;
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val32 = actmon_module_readl(module, HOST1X_ACTMON_MODULE_CTRL_REG);
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val32 &= ~HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM_MASK;
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val32 |= HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM(module->consec_upper_num);
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actmon_module_writel(module, val32, HOST1X_ACTMON_MODULE_CTRL_REG);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(host1x_actmon_module_consec_upper_num_fops,
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host1x_actmon_module_consec_upper_num_get,
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host1x_actmon_module_consec_upper_num_set,
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"%lld\n");
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static int host1x_actmon_module_consec_lower_num_get(void *data, u64 *val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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*val = (u64) module->consec_lower_num;
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return 0;
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}
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static int host1x_actmon_module_consec_lower_num_set(void *data, u64 val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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u32 val32;
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module->consec_lower_num = (u32)val;
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val32 = actmon_module_readl(module, HOST1X_ACTMON_MODULE_CTRL_REG);
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val32 &= ~HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM_MASK;
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val32 |= HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM(module->consec_lower_num);
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actmon_module_writel(module, val32, HOST1X_ACTMON_MODULE_CTRL_REG);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(host1x_actmon_module_consec_lower_num_fops,
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host1x_actmon_module_consec_lower_num_get,
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host1x_actmon_module_consec_lower_num_set,
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"%lld\n");
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static int host1x_actmon_module_avg_norm_get(void *data, u64 *val)
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{
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struct host1x_actmon_module *module = (struct host1x_actmon_module *)data;
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struct host1x_actmon *actmon = module->actmon;
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struct host1x_client *client = actmon->client;
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unsigned long client_freq;
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u32 active_clks, client_clks;
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active_clks = actmon_module_readl(module, HOST1X_ACTMON_MODULE_AVG_COUNT_REG);
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client_freq = client->ops->get_rate(client);
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client_clks = ((client_freq / 1000) * actmon->usecs_per_sample) / 1000;
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*val = (u64) (active_clks * 1000) / client_clks;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(host1x_actmon_module_avg_norm_fops,
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host1x_actmon_module_avg_norm_get, NULL,
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"%lld\n");
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static void host1x_actmon_module_debug_init(struct host1x_actmon_module *module)
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{
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struct dentry *debugfs = module->actmon->debugfs;
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char dirname[8];
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if (!debugfs)
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return;
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snprintf(dirname, sizeof(dirname), "module%d", module->type);
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module->debugfs = debugfs_create_dir(dirname, debugfs);
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/* R/W files */
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debugfs_create_file("k", 0644, module->debugfs, module,
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&host1x_actmon_module_k_fops);
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debugfs_create_file("consec_upper_num", 0644, module->debugfs, module,
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&host1x_actmon_module_consec_upper_num_fops);
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debugfs_create_file("consec_lower_num", 0644, module->debugfs, module,
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&host1x_actmon_module_consec_lower_num_fops);
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/* R files */
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debugfs_create_file("usage", 0444, module->debugfs, module,
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&host1x_actmon_module_avg_norm_fops);
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}
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static void host1x_actmon_init(struct host1x_actmon *actmon)
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{
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u32 val;
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/* Global control register */
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host1x_actmon_update_sample_period(actmon);
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/* Global interrupt enable register */
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val = (1 << actmon->num_modules) - 1;
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actmon_writel(actmon, val, HOST1X_ACTMON_INTR_ENB_REG);
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}
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static void host1x_actmon_deinit(struct host1x_actmon *actmon)
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{
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actmon_writel(actmon, 0, HOST1X_ACTMON_CTRL_REG);
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actmon_writel(actmon, 0, HOST1X_ACTMON_INTR_ENB_REG);
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}
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static void host1x_actmon_module_init(struct host1x_actmon_module *module)
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{
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struct host1x_actmon *actmon = module->actmon;
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u32 val;
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/* Local control register */
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val = 0;
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val |= HOST1X_ACTMON_MODULE_CTRL_ACTMON_ENB(1);
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val |= HOST1X_ACTMON_MODULE_CTRL_ENB_PERIODIC(1);
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val |= HOST1X_ACTMON_MODULE_CTRL_K_VAL(module->k);
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val |= HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM(module->consec_upper_num);
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val |= HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM(module->consec_lower_num);
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actmon_module_writel(module, val, HOST1X_ACTMON_MODULE_CTRL_REG);
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/* Interrupt enable register */
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val = 0;
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val |= HOST1X_ACTMON_MODULE_INTR_AVG_BELOW_WORK_ENB(1);
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val |= HOST1X_ACTMON_MODULE_INTR_AVG_ABOVE_WORK_ENB(1);
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val |= HOST1X_ACTMON_MODULE_INTR_CONSEC_BELOW_WORK_ENB(1);
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val |= HOST1X_ACTMON_MODULE_INTR_CONSEC_ABOVE_WORK_ENB(1);
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actmon_module_writel(module, val, HOST1X_ACTMON_MODULE_INTR_ENB_REG);
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/* Interrupt status register */
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actmon_module_writel(module, 0xffffffff, HOST1X_ACTMON_MODULE_INTR_STATUS_REG);
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/* Consecutive watermark registers */
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actmon_module_writel(module, 0xffffffff, HOST1X_ACTMON_MODULE_UPPER_WMARK_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_LOWER_WMARK_REG);
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/* Moving-average watermark registers */
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actmon_module_writel(module, 0xffffffff, HOST1X_ACTMON_MODULE_AVG_UPPER_WMARK_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_AVG_LOWER_WMARK_REG);
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/* Init average value register */
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_INIT_AVG_REG);
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}
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static void host1x_actmon_module_deinit(struct host1x_actmon_module *module)
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{
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_CTRL_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_INTR_ENB_REG);
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actmon_module_writel(module, 0xffffffff, HOST1X_ACTMON_MODULE_INTR_STATUS_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_UPPER_WMARK_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_LOWER_WMARK_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_AVG_UPPER_WMARK_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_AVG_LOWER_WMARK_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_INIT_AVG_REG);
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actmon_module_writel(module, 0, HOST1X_ACTMON_MODULE_COUNT_WEIGHT_REG);
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}
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int host1x_actmon_register(struct host1x_client *client)
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{
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struct host1x *host = dev_get_drvdata(client->host->parent);
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struct host1x_info *info = host->info;
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struct host1x_actmon_entry *entry = NULL;
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struct host1x_actmon_module *module;
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struct host1x_actmon *actmon;
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int i, err;
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if (!host->actmon_regs || !host->actmon_clk)
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return -ENODEV;
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for (i = 0; i < info->num_actmon_entries; i++) {
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if (info->actmon_table[i].classid == client->class)
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entry = &info->actmon_table[i];
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}
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if (!entry)
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return -ENODEV;
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actmon = devm_kzalloc(client->dev, sizeof(*actmon), GFP_KERNEL);
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if (!actmon)
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return -ENOMEM;
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actmon->client = client;
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actmon->rate = clk_get_rate(host->actmon_clk);
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actmon->regs = host->actmon_regs + entry->offset;
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actmon->irq = entry->irq;
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actmon->name = entry->name;
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actmon->num_modules = entry->num_modules;
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actmon->usecs_per_sample = 1500;
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/* Configure actmon registers */
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host1x_actmon_init(actmon);
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/* Create debugfs for the actmon */
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host1x_actmon_debug_init(actmon);
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/* Configure actmon module registers */
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for (i = 0; i < actmon->num_modules; i++) {
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module = &actmon->modules[i];
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module->actmon = actmon;
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module->type = i;
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module->regs = actmon->regs + (i * HOST1X_ACTMON_MODULE_OFFSET);
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module->k = 6;
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module->consec_upper_num = 7;
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module->consec_lower_num = 7;
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host1x_actmon_module_init(module);
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/* Create debugfs for the actmon module */
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host1x_actmon_module_debug_init(module);
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}
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client->actmon = actmon;
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return 0;
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}
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EXPORT_SYMBOL(host1x_actmon_register);
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int host1x_actmon_unregister(struct host1x_client *client)
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{
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struct host1x_actmon_module *module;
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struct host1x *host = dev_get_drvdata(client->host->parent);
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struct host1x_actmon *actmon = client->actmon;
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int i;
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if (!host->actmon_regs || !host->actmon_clk)
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return 0;
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if (!actmon)
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return 0;
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for (i = 0; i < actmon->num_modules; i++) {
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module = &actmon->modules[i];
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host1x_actmon_module_deinit(module);
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debugfs_remove_recursive(module->debugfs);
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}
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debugfs_remove_recursive(actmon->debugfs);
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host1x_actmon_deinit(actmon);
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return 0;
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}
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EXPORT_SYMBOL(host1x_actmon_unregister);
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void host1x_actmon_update_client_rate(struct host1x_client *client,
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unsigned long rate,
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u32 *weight)
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{
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struct host1x_actmon *actmon = client->actmon;
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struct host1x_actmon_module *module;
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u32 val;
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int i;
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if (!actmon) {
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*weight = 0;
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return;
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}
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val = (rate / actmon->rate) << 2;
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for (i = 0; i < actmon->num_modules; i++) {
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module = &actmon->modules[i];
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actmon_module_writel(module, val, HOST1X_ACTMON_MODULE_COUNT_WEIGHT_REG);
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}
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*weight = val;
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}
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EXPORT_SYMBOL(host1x_actmon_update_client_rate);
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int host1x_actmon_read_avg_count(struct host1x_client *client)
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{
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45
drivers/gpu/host1x/actmon.h
Normal file
45
drivers/gpu/host1x/actmon.h
Normal file
@@ -0,0 +1,45 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Tegra host1x Actmon
|
||||
*
|
||||
* Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef HOST1X_ACTMON_H
|
||||
#define HOST1X_ACTMON_H
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
enum host1x_actmon_module_type {
|
||||
HOST1X_ACTMON_MODULE_ACTIVE,
|
||||
HOST1X_ACTMON_MODULE_STALL,
|
||||
};
|
||||
|
||||
struct host1x_actmon;
|
||||
|
||||
struct host1x_actmon_module {
|
||||
enum host1x_actmon_module_type type;
|
||||
u32 k;
|
||||
u32 consec_upper_num;
|
||||
u32 consec_lower_num;
|
||||
void __iomem *regs;
|
||||
struct host1x_actmon *actmon;
|
||||
struct dentry *debugfs;
|
||||
};
|
||||
|
||||
struct host1x_client;
|
||||
|
||||
struct host1x_actmon {
|
||||
char *name;
|
||||
unsigned int irq;
|
||||
unsigned int num_modules;
|
||||
unsigned long rate;
|
||||
u32 usecs_per_sample;
|
||||
void __iomem *regs;
|
||||
struct host1x_client *client;
|
||||
struct host1x_actmon_module modules[8];
|
||||
struct dentry *debugfs;
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -3,7 +3,7 @@
|
||||
* Copyright (C) 2010 Google, Inc.
|
||||
* Author: Erik Gilling <konkers@android.com>
|
||||
*
|
||||
* Copyright (C) 2011-2013 NVIDIA Corporation
|
||||
* Copyright (C) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/debugfs.h>
|
||||
@@ -196,6 +196,8 @@ static void host1x_debugfs_init(struct host1x *host1x)
|
||||
/* Store the created entry */
|
||||
host1x->debugfs = de;
|
||||
|
||||
host1x->actmon_debugfs = debugfs_create_dir("actmon", host1x->debugfs);
|
||||
|
||||
debugfs_create_file("status", S_IRUGO, de, host1x, &host1x_debug_fops);
|
||||
debugfs_create_file("status_all", S_IRUGO, de, host1x,
|
||||
&host1x_debug_all_fops);
|
||||
|
||||
@@ -432,6 +432,44 @@ static const struct host1x_sid_entry tegra234_sid_table[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static const struct host1x_actmon_entry tegra234_actmon_table[] = {
|
||||
{
|
||||
.classid = HOST1X_CLASS_NVENC,
|
||||
.name = "nvenc",
|
||||
.irq = 2,
|
||||
.offset = 0x00000,
|
||||
.num_modules = 1,
|
||||
},
|
||||
{
|
||||
.classid = HOST1X_CLASS_VIC,
|
||||
.name = "vic",
|
||||
.irq = 3,
|
||||
.offset = 0x10000,
|
||||
.num_modules = 1,
|
||||
},
|
||||
{
|
||||
.classid = HOST1X_CLASS_NVDEC,
|
||||
.name = "nvdec",
|
||||
.irq = 4,
|
||||
.offset = 0x20000,
|
||||
.num_modules = 1,
|
||||
},
|
||||
{
|
||||
.classid = HOST1X_CLASS_NVJPG,
|
||||
.name = "nvjpg",
|
||||
.irq = 5,
|
||||
.offset = 0x30000,
|
||||
.num_modules = 1,
|
||||
},
|
||||
{
|
||||
.classid = HOST1X_CLASS_NVJPG1,
|
||||
.name = "nvjpg1",
|
||||
.irq = 6,
|
||||
.offset = 0x40000,
|
||||
.num_modules = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct host1x_info host1x08_info = {
|
||||
.nb_channels = 63,
|
||||
.nb_pts = 1024,
|
||||
@@ -445,6 +483,8 @@ static const struct host1x_info host1x08_info = {
|
||||
.has_common = true,
|
||||
.num_sid_entries = ARRAY_SIZE(tegra234_sid_table),
|
||||
.sid_table = tegra234_sid_table,
|
||||
.num_actmon_entries = ARRAY_SIZE(tegra234_actmon_table),
|
||||
.actmon_table = tegra234_actmon_table,
|
||||
.streamid_vm_table = { 0x1004, 128 },
|
||||
.classid_vm_table = { 0x1404, 25 },
|
||||
.mmio_vm_table = { 0x1504, 25 },
|
||||
|
||||
@@ -83,6 +83,14 @@ struct host1x_intr_ops {
|
||||
int (*free_syncpt_irq)(struct host1x *host);
|
||||
};
|
||||
|
||||
struct host1x_actmon_entry {
|
||||
int classid;
|
||||
const char *name;
|
||||
unsigned int irq;
|
||||
unsigned int offset;
|
||||
unsigned int num_modules;
|
||||
};
|
||||
|
||||
struct host1x_sid_entry {
|
||||
unsigned int base;
|
||||
unsigned int offset;
|
||||
@@ -107,6 +115,8 @@ struct host1x_info {
|
||||
bool has_common; /* has common registers separate from hypervisor */
|
||||
unsigned int num_sid_entries;
|
||||
const struct host1x_sid_entry *sid_table;
|
||||
unsigned int num_actmon_entries;
|
||||
const struct host1x_actmon_entry *actmon_table;
|
||||
struct host1x_table_desc streamid_vm_table;
|
||||
struct host1x_table_desc classid_vm_table;
|
||||
struct host1x_table_desc mmio_vm_table;
|
||||
@@ -170,6 +180,7 @@ struct host1x {
|
||||
struct host1x_memory_context_list context_list;
|
||||
|
||||
struct dentry *debugfs;
|
||||
struct dentry *actmon_debugfs;
|
||||
|
||||
struct mutex devices_lock;
|
||||
struct list_head devices;
|
||||
|
||||
44
drivers/gpu/host1x/hw/actmon.h
Normal file
44
drivers/gpu/host1x/hw/actmon.h
Normal file
@@ -0,0 +1,44 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Tegra host1x Actmon Register Offsets
|
||||
*
|
||||
* Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __HOST1X_ACTMON_HARDWARE_H
|
||||
#define __HOST1X_ACTMON_HARDWARE_H
|
||||
|
||||
#define HOST1X_ACTMON_MODULE_OFFSET 0x80
|
||||
|
||||
#define HOST1X_ACTMON_CTRL_REG 0x0
|
||||
#define HOST1X_ACTMON_INTR_ENB_REG 0x4
|
||||
#define HOST1X_ACTMON_MODULE_INIT_AVG_REG 0x14
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_REG 0x80
|
||||
#define HOST1X_ACTMON_MODULE_INTR_ENB_REG 0x84
|
||||
#define HOST1X_ACTMON_MODULE_INTR_STATUS_REG 0x88
|
||||
#define HOST1X_ACTMON_MODULE_UPPER_WMARK_REG 0x8c
|
||||
#define HOST1X_ACTMON_MODULE_LOWER_WMARK_REG 0x90
|
||||
#define HOST1X_ACTMON_MODULE_AVG_UPPER_WMARK_REG 0x94
|
||||
#define HOST1X_ACTMON_MODULE_AVG_LOWER_WMARK_REG 0x98
|
||||
#define HOST1X_ACTMON_MODULE_AVG_COUNT_REG 0xa4
|
||||
#define HOST1X_ACTMON_MODULE_COUNT_WEIGHT_REG 0xa8
|
||||
|
||||
#define HOST1X_ACTMON_CTRL_SOURCE(v) ((v & 0x3) << 8)
|
||||
#define HOST1X_ACTMON_CTRL_SAMPLE_TICK(v) ((v & 0x1) << 10)
|
||||
#define HOST1X_ACTMON_CTRL_SAMPLE_PERIOD(v) ((v & 0xff) << 0)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_ACTMON_ENB(v) ((v & 0x1) << 31)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM(v) ((v & 0x7) << 26)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM(v) ((v & 0x7) << 21)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_ENB_PERIODIC(v) ((v & 0x1) << 13)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_K_VAL(v) ((v & 0x7) << 10)
|
||||
#define HOST1X_ACTMON_MODULE_INTR_CONSEC_ABOVE_WORK_ENB(v) ((v & 0x1) << 31)
|
||||
#define HOST1X_ACTMON_MODULE_INTR_CONSEC_BELOW_WORK_ENB(v) ((v & 0x1) << 30)
|
||||
#define HOST1X_ACTMON_MODULE_INTR_AVG_ABOVE_WORK_ENB(v) ((v & 0x1) << 29)
|
||||
#define HOST1X_ACTMON_MODULE_INTR_AVG_BELOW_WORK_ENB(v) ((v & 0x1) << 28)
|
||||
|
||||
#define HOST1X_ACTMON_CTRL_SAMPLE_PERIOD_MASK 0xff
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM_MASK (0x7 << 26)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM_MASK (0x7 << 21)
|
||||
#define HOST1X_ACTMON_MODULE_CTRL_K_VAL_MASK (0x7 << 10)
|
||||
|
||||
#endif
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* Copyright (c) 2009-2013, NVIDIA Corporation. All rights reserved.
|
||||
* Copyright (c) 2009-2023, NVIDIA Corporation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_HOST1X_H
|
||||
@@ -68,6 +68,7 @@ static inline void host1x_bo_cache_destroy(struct host1x_bo_cache *cache)
|
||||
* @late_exit: host1x client late tear down code
|
||||
* @suspend: host1x client suspend code
|
||||
* @resume: host1x client resume code
|
||||
* @get_rate: host1x client get clock rate code
|
||||
*/
|
||||
struct host1x_client_ops {
|
||||
int (*early_init)(struct host1x_client *client);
|
||||
@@ -76,8 +77,11 @@ struct host1x_client_ops {
|
||||
int (*late_exit)(struct host1x_client *client);
|
||||
int (*suspend)(struct host1x_client *client);
|
||||
int (*resume)(struct host1x_client *client);
|
||||
unsigned long (*get_rate)(struct host1x_client *client);
|
||||
};
|
||||
|
||||
struct host1x_actmon;
|
||||
|
||||
/**
|
||||
* struct host1x_client - host1x client structure
|
||||
* @list: list node for the host1x client
|
||||
@@ -93,6 +97,7 @@ struct host1x_client_ops {
|
||||
* @usecount: reference count for this structure
|
||||
* @lock: mutex for mutually exclusive concurrency
|
||||
* @cache: host1x buffer object cache
|
||||
* @actmon: unit actmon for this client
|
||||
*/
|
||||
struct host1x_client {
|
||||
struct list_head list;
|
||||
@@ -113,6 +118,8 @@ struct host1x_client {
|
||||
struct mutex lock;
|
||||
|
||||
struct host1x_bo_cache cache;
|
||||
|
||||
struct host1x_actmon *actmon;
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -507,5 +514,10 @@ static inline void host1x_memory_context_put(struct host1x_memory_context *cd)
|
||||
#endif
|
||||
|
||||
int host1x_actmon_read_avg_count(struct host1x_client *client);
|
||||
int host1x_actmon_register(struct host1x_client *client);
|
||||
int host1x_actmon_unregister(struct host1x_client *client);
|
||||
void host1x_actmon_update_client_rate(struct host1x_client *client,
|
||||
unsigned long rate,
|
||||
u32 *weight);
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user