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platform:dce: Add a delay between ivc reset

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Add a few microseconds delay between IVC channel reset retries.
This prevents kernel logs from flooding if dce bootstrapping takes
some time for any reason.

Based on logs below, DCE is taking around 10-30 microsecond for channel reset.
So, Keeping the delay of 10-20 microseconds.

20:26:46.637409: dce: dce_mailbox_set_full_interrupt:157  Intr bit set multiple times for MB : [0x5]
20:26:46.637421: message repeated 15 times: [ dce: dce_mailbox_set_full_interrupt:157  Intr bit set multiple times for MB : [0x5]]
---
20:26:46.637429: dce: dce_mailbox_set_full_interrupt:157  Intr bit set multiple times for MB : [0x1]
20:26:46.637458: message repeated 12 times: [ dce: dce_mailbox_set_full_interrupt:157  Intr bit set multiple times for MB : [0x1]]
----
20:26:46.637461: dce: dce_mailbox_set_full_interrupt:157  Intr bit set multiple times for MB : [0x2]
20:26:46.637471: message repeated 15 times: [ dce: dce_mailbox_set_full_interrupt:157  Intr bit set multiple times for MB : [0x2]]

Jira TDS-6381

Change-Id: I0f8d3c55058019df5a52edd232eae93b3bf84276
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3304216
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mahesh Kumar
2025-02-17 12:43:22 +00:00
committed by Jon Hunter
parent 965bd044c6
commit fb5f279667
1 changed files with 1 additions and 1 deletions
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2
drivers/platform/tegra/dce/dce-ipc.c
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@@ -431,7 +431,7 @@ void dce_ipc_channel_reset(struct tegra_dce *d, u32 ch_type)
do {
if (dce_ipc_channel_is_ready(d, ch_type) == true)
break;
dce_os_usleep_range(10, 20);
} while (true);
dce_os_mutex_lock(&ch->lock);