drivers: pva: fix desc check with bl and hwseq

when hw sequencer is in use, BL format is supported and
block height log2 needs to be retrieved form channel.

*retrieve block height information while walking descriptor list.

Bug 4166395

Change-Id: Ie6f71c107b74eb01a547baf24ff621ac3446d522
Signed-off-by: omar <onemri@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2929277
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Lachlan Dowling <ldowling@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
omar
2023-06-30 13:31:11 +00:00
committed by mobile promotions
parent 2e1f1dca9e
commit fbcd05f070

View File

@@ -1702,6 +1702,8 @@ verify_hwseq_blob(struct pva_submit_task *task,
struct pva_hwseq_cr_header_s *end_addr;
struct pva_hwseq_priv_s *hwseq_info = &task->hwseq_info[ch_num - 1];
struct pva_dma_hwseq_desc_entry_s *desc_entries = &task->desc_entries[ch_num - 1][0];
s8 *desc_block_height_log2 = task->desc_block_height_log2;
u32 end = user_ch->hwseqEnd * 4;
u32 start = user_ch->hwseqStart * 4;
int err = 0;
@@ -1767,6 +1769,8 @@ verify_hwseq_blob(struct pva_submit_task *task,
start += sizeof(blob->f_header);
end += 4;
for (i = 0; i < cr_count; i++) {
u8 did;
num_descriptors = cr_header->dec + 1;
num_desc_entries = (cr_header->dec + 2) / 2;
nvpva_dbg_fn(task->pva,
@@ -1802,13 +1806,15 @@ verify_hwseq_blob(struct pva_submit_task *task,
goto out;
}
desc_entries[k].did = array_index_nospec((blob_desc->did1 - 1),
did = array_index_nospec((blob_desc->did1 - 1U),
NVPVA_TASK_MAX_DMA_DESCRIPTORS);
desc_entries[k].did = did;
desc_entries[k].dr = blob_desc->dr1;
hwseq_info->tiles_per_packet += (blob_desc->dr1 + 1U);
nvpva_dbg_fn(task->pva,
"tiles per packet=%d",
hwseq_info->tiles_per_packet);
desc_block_height_log2[did] = user_ch->blockHeight;
++k;
if (k >= num_descriptors) {
++blob_desc;
@@ -1824,13 +1830,15 @@ verify_hwseq_blob(struct pva_submit_task *task,
goto out;
}
desc_entries[k].did = array_index_nospec((blob_desc->did2 - 1),
did = array_index_nospec((blob_desc->did2 - 1U),
NVPVA_TASK_MAX_DMA_DESCRIPTORS);
desc_entries[k].did = did;
desc_entries[k].dr = blob_desc->dr2;
hwseq_info->tiles_per_packet += (blob_desc->dr2 + 1U);
nvpva_dbg_fn(task->pva,
"tiles per packet=%d",
hwseq_info->tiles_per_packet);
desc_block_height_log2[did] = user_ch->blockHeight;
++blob_desc;
}