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platform: DCE: Add OOT support for ipc

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Reorg DCE-KMD IPC code to use only upstream IVC APIs
This will simplify integrating the code for OOT.

Bug 3583600
Bug 3713048

Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Change-Id: Ia124f7bc77a788b94b0bf60634ed740c77228725
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2790847
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mahesh Kumar
2022-09-13 12:44:24 +05:30
committed by Laxman Dewangan
parent a42af2d0ad
commit fde8d45bbe
4 changed files with 26 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/platform/tegra/dce/Makefile
View File

@@ -9,9 +9,15 @@ ccflags-y += -Wno-error=cpp
ifeq ($(VERSION),4) ifeq ($(VERSION),4)
ccflags-y += -Wextra -Wno-unused-parameter -Wno-missing-field-initializers ccflags-y += -Wextra -Wno-unused-parameter -Wno-missing-field-initializers
endif endif
obj-$(CONFIG_TEGRA_DCE) += tegra-dce.o
tegra-dce-y += \ # Set config when build as OOT module.
ifeq ($(CONFIG_TEGRA_OOT_MODULE),m)
CONFIG_TEGRA_DCE := m
ccflags-y += -I$(srctree.nvidia)/include
endif
obj-$(CONFIG_TEGRA_DCE) += tegra-dce.o
tegra-dce-$(CONFIG_TEGRA_DCE) += \
dce-ast.o \ dce-ast.o \
dce-reset.o \ dce-reset.o \
dce-hsp-smb.o \ dce-hsp-smb.o \
@@ -28,7 +34,9 @@ tegra-dce-y += \
dce-module.o \ dce-module.o \
dce-util-common.o dce-util-common.o
tegra-dce-$(CONFIG_DEBUG_FS) += \ ifeq ($(CONFIG_DEBUG_FS),y)
tegra-dce-$(CONFIG_TEGRA_DCE) += \
dce-debug.o dce-debug.o
endif
ccflags-y += -I$(srctree.nvidia-t23x)/drivers/platform/tegra/dce/include ccflags-y += -I$(srctree.nvidia-t23x)/drivers/platform/tegra/dce/include

22
drivers/platform/tegra/dce/dce-ipc.c
View File

@@ -201,13 +201,13 @@ void dce_ipc_free_region(struct tegra_dce *d)
/** /**
* dce_ipc_signal_target - Generic function to signal target. * dce_ipc_signal_target - Generic function to signal target.
* *
* @d_ivc : Pointer to struct ivc. * @d_ivc : Pointer to struct tegra_ivc.
* *
* Do not take a channel lock here. * Do not take a channel lock here.
* *
* Return : Void. * Return : Void.
*/ */
static void dce_ipc_signal_target(struct ivc *ivc) static void dce_ipc_signal_target(struct tegra_ivc *ivc, void *data)
{ {
} }
@@ -336,12 +336,10 @@ int dce_ipc_channel_init(struct tegra_dce *d, u32 ch_type)
dev = dev_from_dce(d); dev = dev_from_dce(d);
ret = tegra_ivc_init_with_dma_handle(&ch->d_ivc, ret = tegra_ivc_init(&ch->d_ivc, NULL, r->base + r->s_offset,
(uintptr_t)r->base + r->s_offset, r->iova + r->s_offset, r->base + r->s_offset + q_sz,
r->iova + r->s_offset, r->iova + r->s_offset + q_sz, q_info->nframes, msg_sz,
(uintptr_t)r->base + r->s_offset + q_sz, dce_ipc_signal_target, NULL);
r->iova + r->s_offset + q_sz,
q_info->nframes, msg_sz, dev, dce_ipc_signal_target);
if (ret) { if (ret) {
dce_err(d, "IVC creation failed"); dce_err(d, "IVC creation failed");
goto out_lock_destroy; goto out_lock_destroy;
@@ -432,7 +430,7 @@ bool dce_ipc_channel_is_ready(struct tegra_dce *d, u32 ch_type)
dce_mutex_lock(&ch->lock); dce_mutex_lock(&ch->lock);
ret = (tegra_ivc_channel_notified(&ch->d_ivc) ? false : true); ret = (tegra_ivc_notified(&ch->d_ivc) ? false : true);
if (ret == false) if (ret == false)
ch->signal.notify(d, &ch->signal.to_d); ch->signal.notify(d, &ch->signal.to_d);
@@ -480,7 +478,7 @@ void dce_ipc_channel_reset(struct tegra_dce *d, u32 ch_type)
dce_mutex_lock(&ch->lock); dce_mutex_lock(&ch->lock);
tegra_ivc_channel_reset(&ch->d_ivc); tegra_ivc_reset(&ch->d_ivc);
trace_ivc_channel_reset_triggered(d, ch); trace_ivc_channel_reset_triggered(d, ch);
@@ -793,11 +791,13 @@ int dce_ipc_get_region_iova_info(struct tegra_dce *d, u64 *iova, u32 *size)
bool dce_ipc_is_data_available(struct tegra_dce *d, u32 ch_type) bool dce_ipc_is_data_available(struct tegra_dce *d, u32 ch_type)
{ {
bool ret = false; bool ret = false;
void *frame;
struct dce_ipc_channel *ch = d->d_ipc.ch[ch_type]; struct dce_ipc_channel *ch = d->d_ipc.ch[ch_type];
dce_mutex_lock(&ch->lock); dce_mutex_lock(&ch->lock);
if (tegra_ivc_can_read(&ch->d_ivc)) frame = tegra_ivc_read_get_next_frame(&ch->d_ivc);
if (!IS_ERR(frame))
ret = true; ret = true;
dce_mutex_unlock(&ch->lock); dce_mutex_unlock(&ch->lock);

5
drivers/platform/tegra/dce/include/dce-ipc.h
View File

@@ -15,8 +15,7 @@
#define DCE_IPC_H #define DCE_IPC_H
#include <dce-lock.h> #include <dce-lock.h>
#include <linux/tegra-ivc-instance.h> #include <soc/tegra/ivc.h>
#include <linux/tegra-ivc.h>
#include <interface/dce-admin-cmds.h> #include <interface/dce-admin-cmds.h>
#include <interface/dce-core-interface-ipc-types.h> #include <interface/dce-core-interface-ipc-types.h>
#include <interface/dce-ipc-state.h> #include <interface/dce-ipc-state.h>
@@ -131,7 +130,7 @@ struct dce_ipc_channel {
u32 ipc_type; u32 ipc_type;
void *ibuff; void *ibuff;
void *obuff; void *obuff;
struct ivc d_ivc; struct tegra_ivc d_ivc;
struct tegra_dce *d; struct tegra_dce *d;
struct dce_mutex lock; struct dce_mutex lock;
struct dce_ipc_signal signal; struct dce_ipc_signal signal;

8
include/trace/events/dce_events.h
View File

@@ -1,9 +1,5 @@
/* /*
* include/trace/events/dce_events.h * Copyright (c) 2020-2022, NVIDIA CORPORATION, All rights reserved.
*
* Display event logging to ftrace.
*
* Copyright (c) 2020-, NVIDIA CORPORATION, All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -45,7 +41,7 @@ DECLARE_EVENT_CLASS(dce_ipc_events_notifier,
"No of Frames = [%u], Rx Iova = [0x%llx], Tx Iova = [0x%llx], Region Current Offset = [%u], Region Iova Base = [0x%llx], " "No of Frames = [%u], Rx Iova = [0x%llx], Tx Iova = [0x%llx], Region Current Offset = [%u], Region Iova Base = [0x%llx], "
"Region Size = [%lu] Region Base Address = [0x%p]", "Region Size = [%lu] Region Base Address = [0x%p]",
__entry->ch->ch_type, __entry->ch->flags, __entry->ch->w_type, __entry->ch->ch_type, __entry->ch->flags, __entry->ch->w_type,
__entry->ch->d_ivc.w_pos, __entry->ch->d_ivc.r_pos, __entry->ch->d_ivc.tx.position, __entry->ch->d_ivc.rx.position,
__entry->ch->q_info.frame_sz, __entry->ch->q_info.nframes, __entry->ch->q_info.frame_sz, __entry->ch->q_info.nframes,
__entry->ch->q_info.rx_iova, __entry->ch->q_info.tx_iova, __entry->ch->q_info.rx_iova, __entry->ch->q_info.tx_iova,
__entry->d->d_ipc.region.s_offset, __entry->d->d_ipc.region.iova, __entry->d->d_ipc.region.s_offset, __entry->d->d_ipc.region.iova,