Issue: APIs like osi_clear_tx/rx_intr, osi_update_rx_tailptr
are redundant. The operations that are done in these
functions can be included as part of other existing
OSD-OSI interface API. OSD need not micro-manage the
hardware controller by using such fine grain APIs.
Fix: Remove the redundant APIs and implement their functionality
as part of existing APIs.
Bug 2715391
Change-Id: Ib2feee7b9080d3762ddd33f79f5410ef10a43a07
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2211092
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Receive timestamp for a received packet will be in context descriptor
which is immediate of normal descriptor (has valid packet data)
In current case nvethernet driver only unmap normal descriptor buffer
address and provide the buffer to the network stack for data processing.
Context descriptor buffer is not unmapped which leads to running out of
IOVA space for the new buffers.
Context descriptor buffer can be used as is since that is not provided
to the network stack. So this change to skip new buffer allocation and
mapping for the context descriptor which has receive timestamp and use
already allocated buffer.
Bug 2700522
Change-Id: I55ef09286d20262384f792aa8875523ab3d3e9b9
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2214732
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Issue:
1) MTL Queue can be in any order in input to DT. If not
initialized sw can crash.
2) Don't use return value of skb_get_queue_mapping as
channel number.
Fix:
1) As MTL Queue sequence is already read, use it for
initialization and storing corresponding configuration.
2) Derive the channel number based on the q index
provided by skb_get_queue_mapping.
Bug 200512422
Change-Id: I145f67ee07101ae69821b5ae4a770e512252985b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2156243
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
These stats are read from MAC HW RMON counters as well as SW controlled
control from Core and DMA path.
ethtool -S <interface> is used to get statistics.
There are 3 stats
1) ether_mmc_counters: EQOS HW counters
2) ether_xtra_stat_counters: SW counters from osi/core
3) ether_xtra_dma_stat_counters: SW counters from osi/dma
Bug 200519211
Change-Id: I5b1b6592541c650f01e845667eca2f5c59bcfd08
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113962
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
1. ARP offload can be configured via private ioctl.
Application requesting the arp offload configuration
should provide the IP address to be configured for
ARP offload via ioctl data struct. Refer to
struct ether_ifr_data and
struct arp_offload_param for details.
2. Tx/Rx Checksum offload can be configured via ethtool
3. TCP Segmentation offload can be configured via ethtool
Bug 2571001
Change-Id: If639ab9049db97f200911af456ddb8cb8433fa12
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109676
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
1) support for driver probe based on nveqos
2) support for EQOS hw init
3) data transmission support for Tx and Rx
Bug 200507585
Change-Id: I5c8bc88f97b2e61a2b346a23aadcb19a7b8c53a5
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>