In Linux v5.18, commit 20c238dfb26c ("media: v4l2-mediabus: Drop legacy
V4L2_MBUS_CSI2_*_LANE flags"), commit 5a6ac3f4b46f ("media:
v4l2-mediabus: Drop legacy V4L2_MBUS_CSI2_CHANNEL_* flags") and
commit b9f7caa7753a ("media: v4l2-mediabus: Drop
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK flag") removed various CSI2 flags.
Out of these flags we only need to set the number of lanes. The other
flags are redundant. The configuration was moved by
commit 94d964e58ad6 ("media: v4l2-fwnode: Move bus config structure
to v4l2_mediabus.h") to the structure v4l2_mbus_config_mipi_csi2
which itself is under the structure v4l2_fwnode_endpoint. Use conftest
to detect if the structure v4l2_mbus_config_mipi_csi2 is present and
avoid using kernel version checks.
Bug 4425688
Change-Id: Icd597492e48831326c203a6556176ac3767472a3
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3354475
(cherry picked from commit 2f83033498)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3354638
Reviewed-by: Paritosh Dixit <paritoshd@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Use DIV_ROUND_DOWN_ULL consistently for frequency calculations to match
QNX implementation. For 30Hz signals, reference ticks were calculated
as 1041667 for a value of 1041666.67, while QNX correctly uses 1041666.
When generating precise frequencies, this rounding difference affects
how extra ticks distribute across periods (covering the 0.67 gap over
3 periods). The QNX implementation works correctly because it rounds down,
while the Linux implementation was rounding up.
This change ensures proper fractional tick distribution and prevents
signal drift over time for frequencies that aren't exact multiples of
the TSC clock unit.
Bug 5223558
Change-Id: I5fbeafd1e37c92fe95f2f3605d1ae225eacb88c8
Signed-off-by: Mohit Ingale <mohiti@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3348278
Reviewed-by: Justin Kim (SW-TEGRA) <juskim@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Ian Kaszubski <ikaszubski@nvidia.com>
Depending on kernel version the Tegra UFS driver includes different
headers to build the driver. Now that Linux v5.x kernels are no longer
supported, we can simplify this. Simplify the headers for the Tegra UFS
driver as follows ...
1. For Linux v6.x kernels only the ufshcd-priv.h and ufshcd-pltfrm.h
headers are required. These headers are copied from the Linux kernel.
However, only the prototypes for the functions 'ufshcd_query_attr',
'ufshcd_query_descriptor_retry' and 'ufshcd_pltfrm_init' are needed.
The functions 'ufshcd_query_attr' and 'ufshcd_query_descriptor_retry'
have not been change since they were introduced in Linux v4.17 and
the function 'ufshcd_pltfrm_init' was last updated in Linux v6.1
(making the ufs_hba_variant_ops argument const). Although redefining
the prototypes outside the kernel is fragile and does not protect the
Tegra UFS driver from updates to these functions, this problem
already exists.
2. Move the files ufshcd-pltfrm.h and ufshcd-priv.h into the Tegra UFS
driver directory because these are not needed outside of the driver.
JIRA LINQPJ14-47
Change-Id: I3891bf756723f730f036637891c55090b5d2a384
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3349825
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
VPR feature is needed for N1-auto on embedded, while this feature is not
required on 7.0. Hence enable this feature to unblock the VPR testing.
Later on in 7.0.4.0 branch create a patch to disable this feature. Once
we have a uniform solution for handling this from program team, we will
switch to that approach.
Bug 5240456
Change-Id: Ib3773bff8b44525f4a1c3b68cc134d96f5c45ee3
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3348574
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
It may happen that the variable req->iv may have stale values or
zero sized buffer by default and may end up getting used during
encryption/decryption. This in turn may corrupt the results or break
the operation. Ensure not use IV for algorithms like AES ECB where IV
is not expected.
Bug 4883011
Change-Id: I309ad26f99fe54005ff71b270b3b115dc62ac168
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3330469
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
The HW supports only storing 15 keys at a time. This limits the number
of tfms that can work without failutes. Reserve keyslots to solve this
and use the reserved ones during the encryption/decryption operation.
This allow users to have the capability of hardware protected keys
and faster operations if there are limited number of tfms while not
halting the operation if there are more tfms.
Bug 4883011
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I7de17eb1acf3b5a9f55a42e9df2aa8b64e20cb6d
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3347661
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
The intermediate hash values generated during an update task were
handled incorrectly in the driver. The values have a defined format for
each algorithm. Copying and pasting from the HASH_RESULT register
balantly would not work for all the supported algorithms. This incorrect
handling causes failures when there is a context switch between multiple
operations.
To handle the expected format correctly, add a separate buffer for
storing the intermediate results for each request. Remove the previous
copy/paste functions which read/wrote to the registers directly. Instead
configure the hardware to get the intermediate result copied to the
buffer and use host1x path to restore the intermediate hash results.
Bug 4883011
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I54952620906ccfd57d560c4619d17211f67b9ac3
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328440
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Ahash init() function was called asynchronous to the crypto engine queue.
This could corrupt the request context if there is any ongoing operation
for the same request. Queue the init function as well to the crypto
engine queue so that this scenario can be avoided.
Bug 4883011
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I7d5e4629fbd47215c7d7748b675030c1cb63e5ea
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328439
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
The buffer which sends the commands to host1x was shared for all tasks
in the engine. This causes a problem with the setkey() function as it
gets called asynchronous to the crypto engine queue. Modifying the same
cmdbuf in setkey() will corrupt the ongoing host1x task and in turn
break the encryption/decryption operation. Hence use a separate cmdbuf
for setkey().
Bug 4883011
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: Ia6a5376e2c8dfc98e11414666ebf9ade41f10fee
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328437
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Update the Tegra DRM to align with Linux v6.15-rc3. In Linux v6.15-rc3,
the arguments of the 'mode_valid' function pointer of the
drm_connector_helper_funcs structure and the 'atomic_async_check'
function pointer of the drm_plane_helper_funcs structure were updated.
Add conftest tests to detect these updates and make the necessary
changes to the Tegra DRM driver.
JIRA LINQPJ14-47
Change-Id: Id1c8db95390f02258952da78af3dd6ff5acfa631
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3333838
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Adding the build flag '-Werror=declaration-after-statement' to prevent
mixing variable definitions within the body of code. Ideally, we would
enable this for all kernels, but in the latest upstream Linux kernels
this flag has been removed from the kernel build to allow for scope
based declarations in some contexts. However, even in the upstream
kernel declaring variables at the start of the scope is recommended. Add
this flag for noble kernels to ensure that this recommendation is
followed for OOT drivers.
Link: https://lore.kernel.org/lkml/20230612093537.693926033@infradead.org/
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I29648ec41d5a5afb06a41b209c025c7b3fa77e85
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3338231
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
The RTCPU driver fails to build with the compiler option
'-Werror=declaration-after-statement' and the following errors are
observed ...
drivers/platform/tegra/rtcpu/camera-diagnostics.c:900:17: error: ISO
C90 forbids mixed declarations and code
[-Werror=declaration-after-statement]
900 | unsigned long end_time = 0U;
| ^~~~~~~~
drivers/platform/tegra/rtcpu/camera-diagnostics.c:904:17: error: ISO
C90 forbids mixed declarations and code
[-Werror=declaration-after-statement]
904 | bool all_tests_pass = (status.executed > 0 &&
status.passed == status.executed);
| ^~~~
Fix this by declaring the necssary variables at the beginning of the
functions.
Jira CAMERASW-32042
Jira CAMERASW-32960
Change-Id: I6bc652b19f77f0a9bbbe3263cdff371acbc957d7
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3334920
Reviewed-by: Zhiyuan Wang <zhiwang@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Mohit Ingale <mohiti@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Remove power management ops from the host1x bus-side DLA driver. The host1x
bus-side driver is a virtual device and should not directly access hardware.
PM ops should only be used in the platform device driver.
This fixes suspend/resume test failure when tegra-drm is loaded without any
enabled engines under host1x node.
Bug 5055946
Change-Id: I2e07f759e1d92b4c5a92739e1b5439d39800773f
Signed-off-by: Vamsee Vardhan Thummala <vthummala@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3337661
Reviewed-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Mainak Sen <msen@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
