Commit Graph

15 Commits

Author SHA1 Message Date
Mohan Kumar
50217466ed ASoC: tegra-alt: Avoid reg access after shutdown
Below are the hypothetical scenarios
- Drivers are in suspend state while reboot and PCM Open call from
  userspace is received after driver shutdown [APE is power gated
  already]
- PM domain handling doesn't ensure proper functionality after driver
  shutdown is called

The change handles with the below fix
- ALSA PCM Open API first executes runtime resume of each driver.
  So need to prevent any reg access in runtime resume of drivers.
- ALSA PCM Open executes ADMAIF startup after runtime resume of
  each driver. If ADMAIF startup returns failure based on shutdown,
  PCM Open operation will fail, this will break PCM Open path and
  will ensure no further ALSA APIs/Callbacks are called.

Bug 200289815

Change-Id: Ia03e035569375f37ae4b0faa1a4593ce121d2354
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1475208
(cherry picked from commit 3361e95850563f3009a428bb1c01941ed069a7b0)
Reviewed-on: http://git-master/r/1492664
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
2022-09-29 15:30:21 +05:30
Mohan Kumar
4ecda75d43 ASoC: tegra-alt: channels inside ahub via controls
Certain usecase requires different audio and client channels settings
inside ahub, so this needs to be handled with dedicated Channels mixer
control for each module.

This change will introduce channels mixer control and cif controls to
admaif,dmic,i2s and all other internal module is control with a single
channel control.

-Support mono channel SFC
-Support mono channel Mixer
-Cleanup drivers

Bug 1839027

Change-Id: Id997519ebdc9f518c83debc2d4cd58fde34e79b6
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1258877
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-09-29 15:30:21 +05:30
Ravindra Lokhande
8d4601447c ASoC: tegra-alt: fix coverity defect
fix coverity defect "unsigned compared against 0"

Bug 200116059
CID 20237

Change-Id: I8bf81f0ef77a8bc87d5ba38b01e2a3d0e6b7b948
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/929461
GVS: Gerrit_Virtual_Submit
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2022-09-29 15:30:21 +05:30
Ravindra Lokhande
d00fea6da9 ASoC: tegra-alt: add check for pointer before access
add check for context pointer before accessing it in suspend.
Also move setting of driver data at the end of probe function.

Change-Id: I5724ee810dd3ca409412aa21d61d35519b1432a3
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/921743
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
2022-09-29 15:30:21 +05:30
Gaurav Tendolkar
870919fc70 tegra-alt: mvc: curve type and volume gain fixes
- added mixer contols to set curve type,
  cif channels and number of bits.
- modified volume control to increase/decrease
  volume by 1dB for every step (for linear curve)
- changed default curve type to linear
- fixed check on number of channels

Bug 1694107
Change-Id: Ibad07ff2f61fef73e84f5193991b092afaf8db8c
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-on: http://git-master/r/828227
Reviewed-on: http://git-master/r/834971
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
2022-09-29 15:30:21 +05:30
Junghyun Kim
ee8192fe65 ASoC: tegra-alt: Update codec drivers
1. Remove replicate bit and add fifo_size_downshift bit
   in cif
2. Update mask value for dma_fifo_size, dma_fifo_start_addr
   and dma_fifo_threshold in admaif driver
3. Update the copyright
4. Add run time check function to detect FPGA

Bug 1582514
Bug 1582510

Change-Id: I40a8172ebc3713ead4cb5764f291f04d548c7a75
Signed-off-by: Junghyun Kim <juskim@nvidia.com>
Reviewed-on: http://git-master/r/751602
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Tested-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
2022-09-29 15:30:21 +05:30
Ravindra Lokhande
642d1a314c ASoC: tegra-alt: Fix build errors for kernel 3.18
- removed snd_soc_codec_set_cache_io function
- use snd_soc_kcontrol_codec instead of snd_kcontrol_chip
- use codec->component.val_bytes instead of codec->val_bytes
- use devm_ioremap_resource instead of devm_request_and_ioremap
- snd_soc_dapm_mux_update_power prototype is changed

Change-Id: Ieb699a0e8a12b341c6823337ef2deb0d99292240
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
2022-09-29 15:30:21 +05:30
Arun Shamanna Lakshmi
f981c5f62f ASoC: tegra-alt: Set driver params iff clock is ON
Enable the module clock before the setting of any parameters.
Fix I2S Loopback, MVC volume & mute, Mixer Gain parameters.

Bug 200075850

Change-Id: Ieaa532be286de09a47d02db6dbe25db039cccaf3
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/715943
Reviewed-by: Uday Gupta <udayg@nvidia.com>
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>
2022-09-29 15:30:21 +05:30
Dara Ramesh
69b9c724e2 asoc: tegra-alt: support High Resolution Audio
- suport HRA (24 bit, 192 Khz) format on t210.

bug 1502003

Change-Id: I0169b3485dff7316551ebb5541bde158b5a36744
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/661242
(cherry picked from commit f76e5afd5f3b1f0d6861cf5def5e23fcee19d425)
Reviewed-on: http://git-master/r/663308
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashok Mudithanapalli <ashokm@nvidia.com>
Reviewed-by: Srinivas Anne <sanne@nvidia.com>
2022-09-29 15:30:21 +05:30
Sumit Bhattacharya
8f8c3d0aa9 ASoC: tegra-alt: Add default reg values
Set default register values for AHUB modules in regmap. This will
ensure after runtime suspend/resume AHUB register POR values
does not get reset to 0.

Bug 200039212

Change-Id: I38e4c04721450b7511404c0db2911b314b68a880
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/603339
2022-09-29 15:30:21 +05:30
Sumit Bhattacharya
1f080ab1eb ASoC: tegra-alt: T210 power management support
Set idle_bias_off for all t210 xbar modules to ensure module runtime
suspend/resume works when module is idle.

Ensure regcache is synced back to hardware during runtime resume so
that register content does not get lost if it is written during
runtime suspend state.

Add suspend APIs for all module to mark regcache dirty while device
goes into suspend to ensure register values does not get lost across
system suspend/resume.

Change-Id: I2828beeed859df4f8084dd70bbcde5ed62f2525c
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555028
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-09-29 15:30:21 +05:30
Sumit Bhattacharya
36359cf890 ASoC: tegra: Enable/Disable parent runtime pm
Instead of using duplicate clock of "d_audio" for all AHUB modules
get/put runtime pm reference of the parent module from runtime_pm
suspend/resume routine of all AHUB modules. This will ensure AHUB
xbar is up before other drivers tries to access any register. Also
it will ensure both d_audio and APE clocks are enabled when needed.

Bug 200042312

Change-Id: I0346728f15b135bb619de40fbd3fc440a5505940
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/554863
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-09-29 15:30:21 +05:30
Arun Shamanna Lakshmi
5066fe1a3a ASoC: tegra-alt: Use flat regcache
When using RBTREE cache, there can be allocations the first time
a register is accessed. This can cause an attempt to schedule while
atomic in the case that the regmap is using a spinlock. This can be
resolved by using a flat cache.

Bug 200041820

Change-Id: Id69592cd5fadbb5ad9ccfdbb1f184733a332512c
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/552940
2022-09-29 15:30:21 +05:30
Junghyun Kim
6f662309f7 ASoC: tegra-alt: enable clock driver for T210
This change is for enabling clock driver by removing CONFIG_MACH_GRENADA

Bug 1442940
Bug 1537191

Change-Id: I6373df9ee225fc379eafc187b7b13a83580b7fca
Signed-off-by: Junghyun Kim <juskim@nvidia.com>
Reviewed-on: http://git-master/r/454221
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
2022-09-29 15:30:21 +05:30
Songhee Baek
f9bb9e84e5 ASoC: tegra-alt: T210 AHUB drivers
This driver is for T210 AHUB components.

Bug 1442940

Change-Id: If6b33bc89cfc273f8024b7e4f6d644c170c2fe4f
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/397314
(cherry picked from commit 3972fbeccbec85f74a0ed959212382db5471e65d)
Reviewed-on: http://git-master/r/355184
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Rahul Mittal <rmittal@nvidia.com>
2022-09-29 15:30:21 +05:30