Commit Graph

2014 Commits

Author SHA1 Message Date
Shridhar Rasal
7520eea4dd video: tegra: host: enable firmware gcov support
- add debugfs to enable firmware gcov and dump gcov data
- on request for enabling gcov, allocate gcov region and inform
  firmware about gcov PA
- gcda debugfs dumps gcda data stored by firmware

Change-Id: Ibca37048120eba21aa5f1d4936bd4ae5254fdddf
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1586783
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Stephen Warren
d483e0b167 t19x: use kernel overlay features
Update all Kconfig files and Makefiles to rely on the kernel overlay
feature. In particular, don't include any Kconfig files or Makefiles
from other overlays. -I directives in CFLAGS are not yet cleaned up.

Bug 1978395

Change-Id: I5ee70b91c5137dd8b36e0adb56a0763fbf2cb123
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1561188
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Sai Gurrappadi
73f1b216b8 video: tegra: Fix up CV cluster clamping
CV cluster clamping is currently owned partly by nvhost and partly by the
client modules in their poweroff sequences. This leads to a mismatch in
ref counts if the client specific finalize_poweron() call doesn't work.
nvhost side ends up retrying to boot the device three times at which point
we are left with a mismatch in the cluster clamp ref counts.

To fix this, move out cluster clamping back to nvhost which allows us to
maintain consistent state for the ref count.

Bug 200352108

Change-Id: I9ccc71035934ccc147b8d8a8995afd060af333e8
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572788
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
6ea50d7295 video: tegra: host: dla: update firmware version
Change-Id: I2dc1c67a6308a2bf8ba562c1f03b251f12aa7794
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574239
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Amit Sharma (SW-Tegra)
fc6b594563 tegra: host: nvdla: Add dump and trace buffer to nvdla_device
Add dump and trace buffers to nvda_device as nvdla_device is
correct place to keep them.

Jira DLA-330

Change-Id: Id282e49e3586e67a3f57f2151c9f7c3590fa0e5b
Signed-off-by: Amit Sharma (SW-Tegra) <amisharma@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1561392
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
2023-04-14 11:46:40 +00:00
Sai Gurrappadi
5002cec200 video: tegra: host: t19x: CV cluster clamps for pg
The CV cluster needs to be clamped before/after a rail gate/ungate
sequence. Since there is no way to hook into the CV power domain's
poweroff/poweron functions, track references to the CV domain explicitly
by having client CV modules get/put references to the CV cluster.

The first client module to poweron will result in the CV cluster clamp
getting disabled and the last client module to poweroff will result in the
clamp getting set. This will ensure that any subsequent CV rail gating
sequence happens with the clamps in place.

Jira HOSTX-194

Change-Id: Ic65176e15c1a487a020712a02147cbfc3f2f83c3
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1517643
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Ishan Mittal
35c796151b t19x: nvhost-t19x: Change all Makefile to makefile.t19x
Bug 200295104

Change-Id: I51e6444318eda275082bb530a7058b777951aa93
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
2023-04-14 11:46:40 +00:00
Ishan Mittal
044eaae9c2 t19x: Change all references from nvhost to nvidia
- Change references from nvhost to nvidia
- Change references from nvhost-t19x to t19x

Change-Id: I6c9b275bdb20dfa975145124395b61493a1ff5a9
2023-04-14 11:46:40 +00:00
Arto Merilainen
56a67d3275 video: tegra: host: Support channels in queues
This change adds support for allocating channels for queues and
submitting tasks through them. This is useful in cases where
direct MMIO cannot be used for task submission (e.g. virtualization).

JIRA PVA-443

Change-Id: Iae819d03d1d378059310b67ebc2e5af4690d5c80
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/1481833
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Arto Merilainen
9e56c92bc9 video: tegra: host: Support CVNAS
This change modifies code to support to determine if an allocation
has been done from the CVNAS or DRAM. This information is needed
primarily for PVA since it needs to choose the port that is used
for DMA accesses.

JIRA PVA-457

Change-Id: I99305f8940a2c07eadd65999ee175185b257713c
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/1488003
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Arto Merilainen
c3c9346cbd video: tegra: host: Fix releasing of buffers
Currently releasing of the buffers goes through the rb tree,
releases buffers and goes to the next node. However, if the
buffer has been released, rb_next() will point to a released
memory address.

Since rb_tree() might get rebalanced after removal of a node,
rb_next() pointer may no longer be the correct next node. In
order to overcome the issue, this change adds a separate list
for traversing through the nodes sequentically.

JIRA HOSTX-214

Change-Id: I7ab5fd547dec0d3b8d66361bad9f1412ff875b7e
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/1483987
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
2023-04-14 11:46:40 +00:00
Prashant Gaikwad
89e5bb479b video: tegra: host: dla: release from fw bin 0.10.0
Jira DLA-354

Change-Id: I4a4430d213f0bf20a034e92b04d0add5c7ad3009
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1481311
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Inamdar Sharif <isharif@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
cd14b7e09f video: tegra: host: nvdla: add task timeout support
- pass task timeout parameter from user to engine for book keeping
  of task runtime
- as stack framesize crossing limit of 2048 bytes, reduce number of
  maximum task can be submitted in one go.

Jira DLA-374
Bug 200302518

Change-Id: I99d3706d9d80ac0201529d68c0a959cdd22a1488
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1468355
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Inamdar Sharif <isharif@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
24850d2fef video: tegra: host: dla: remove num postaction limit
- User needed to set minimum one postaction as syncpoint, this
limitation has been removed in enhancement in KMD.
- Don't allow user to set queue resume and suspend at same time.

Change-Id: I5d780d4941040211809f72ec770fc4db853551c6
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1478966
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Prashant Gaikwad
4dfdfde5ec video: tegra: host: dla: release from fw bin 0.9.0
Jira DLA-354

Change-Id: I730737cb1fa679618a2a5f66e0d69f82fc38f393
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1474271
Reviewed-by: Inamdar Sharif <isharif@nvidia.com>
Tested-by: Inamdar Sharif <isharif@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
7ee9a72a2d video: tegra: host: add multiple postactions of type SYNCPT/SYNCFD
- Enhance KMD to add multiple postactions of type syncpoint and syncfd
  while task submit only a syncpoint was assigned to given task as
  a postaction. This was limiting to user to submit a task with
  multiple types of actions like, syncpoint, syncfd.
  To overcome limitation: added fence counter for type syncpoint and syncfd,
  registered fence counter with nvhost for syncpoint completion notifier,
  and for individual postaction respective fence sent back to user.
- Timestamp semaphore as a separate preaction is not supported
  by engine, However timestamp semaphore preaction can be inserted
  as semaphore preaction. In that case, engine ignore timestamp
  data and validates semaphore value.
- add debug messages for buffer pin failure paths

Jira DLA-273
Jira DLA-375

Change-Id: I26882d0d61f46bed3c3cace99901ba7c506b9977
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1470472
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
e13e5a98dc video: tegra: host: nvdla: treat syncfd as syncpt/gos
Fence type as syncfd is between user and kernel. Kernel translates
syncpoint as syncfd before sending back postactions.

For engine, syncfd is same as syncpt/gos action, so send syncfd actions as
as syncpt/gos.

Jira DLA-273

Change-Id: I750f112544d2c28bdc14f03f5e823503b09a18ad
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1469528
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Inamdar Sharif <isharif@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Arto Merilainen
6557218255 video: tegra: host: Use dmabuf instead of fd
The buffer management code is currently using fd as the buffer
identifier, however, fds are ambiguous as identifiers: If user
closes a dmabuf fd and allocates a new one, the two buffers may
share the same fd. If the new dmabuf fd is passed to kernel,
kernel incorrectly uses the old memory buffer.

This patch reworks buffer management code to use dmabuf pointers
as identifier instead of dmabuf fds.

Reduce PVA_MAX_PIN_BUFFER from 256 to 64

nvhost_buffer_pin, nvhost_buffer_unpin, nvhost_get_iova_addr,
nvhost_buffer_submit_pin and nvhost_buffer_submit_unpin are
modified to pass dmabuf pointer instead of fd handle.

JIRA PVA-357

Change-Id: I1f736cbcf704d0872a8e97de28308649f0f1586b
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Vinod G <vinodg@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1455918
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Mikko Perttunen
f15d907c3d video: tegra: host: dla: Make nvdla_dump_task static
This function is only used locally, so make it static.

Bug 200088648

Change-Id: Icd387244e5ad0d058def22cba2d021bd82760901
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: http://git-master/r/1330520
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Prashant Gaikwad
e6da13f8df video: tegra: host: dla: release from fw bin 0.8.0
Manual padding added in DLA interface

Change-Id: I49b59ee7dc76e1d2fd1da32bba40251f5b2e7598
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1454511
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
24e20161d9 video: tegra: host: dla: add IOCTL to send fw version and q status
- Add IOCTL to send DLA firmware version.
- If DLA engine is not powered on before IOCTL call, poweron engine and
  send version.
- Add IOCTL to send queue status, like current fence

Jira DLA-316
Jira DLA-336

Change-Id: I2367446f99809253c4b765b751d66712f969442c
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1326511
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
2023-04-14 11:46:40 +00:00
Mikko Perttunen
22eef7be76 video: tegra: host: Fix T19x driver build on kernel 4.9
NVDLA and PVA drivers still rely on the old DMA
attribute API, so fix them to work on both pre-4.9
and 4.9 APIs.

Bug 1852328

Change-Id: I6f32670dc1da458e642156b4bbd8c104d4984f75
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: http://git-master/r/1453038
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
9975af6bd9 video: tegra: host: dla: add flag for GoS enable
- add flag to check gos enabled status
- As there is no clean way to get GoS enable status without invoking any
  GoS API, ignore error from retrieving GoS regions table.
- However, update gos enable flag based on return status from GoS API.
- Use this flag for retriving GoS syncpoint IOVA, this is required to
  avoid
  un-necessary calls to nvhost and nvmap.

- __func__ is already included in DLA debug print wrapper API's, remove
  redundant parameters passing

- Fix dumping num of prefences

- In task submission, as network descriptor is mandatory to pass to
  engine, expect minimum one num of addresses per task.

Jira DLA-326

Change-Id: I2483a606fd8454a92363cfbaf4462280e221e20c
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1322085
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2023-04-14 11:46:40 +00:00
Prashant Gaikwad
5b4625fc7a video: tegra: host: dla: release from fw bin 0.7.0
Jira DLA-312

Change-Id: I84f31dd6bb5919838ed4ef169894687ebf44637d
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1309410
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
8d762b1892 video: tegra: host: dla: add GoS region feature
- use of GoS region gives better performance for reading for than
  one GoS from same region compared to reading using semaphores.
- Add Gos region based approach for filling GoS action

Jira DLA-326

Change-Id: I4fab7d7fad2f3120b1d0900dfb94912bce01b95b
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1317112
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
5399f69fc7 video: tegra: host: dla: fix filling postaction
- firmware should update output status before updating semaphores,
  reorder postaction list.
- add firmware version checks support for different variation of code
- firmware expect that, printf buffer shouldn't be aligned by 256 after
  version 0.6.0, fix setting printf buffer start address.

Jira DLA-312

Change-Id: I98695678523021a6e98b8f90f5c294db3ed2a634
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1317111
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
2023-04-14 11:46:40 +00:00
Mikko Perttunen
32181417d1 video: tegra: host: Use $(srctree) in relative paths
In kernel 4.9, plain relative paths no longer work for
include paths, so prepend $(srctree).

Change-Id: I4c0efcb15977d6c6f16b5c7891ecb95e6c5a6fea
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: http://git-master/r/1313922
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
94b372e4e0 video: tegra: host: expect more than one postfence
- postfence completion routine triggers clean up of task data and
  inform UMD of completion of task, so expect minimum one postfence
  for task submit.
- add more debug message.
- validate task data after copying user data
- use local task pointer for copying postfences
- dump input task parameters

Jira DLA-251
Bug 200088648

Change-Id: I3980e095586112d50381057aa7e19991d77fdf32
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1311386
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
d1587acdc0 video: tegra: host: dla: validate parameters before copy
Validate all input parameters before copy_to_usr to local parameter.

CID 1705805

Change-Id: Id5d236c8dc9d075bb610a2318dd0a11fa34bfb25
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1303723
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
7c08e4e57d video: tegra: host: dla: release from fw bin 0.6.0
Jira DLA-302

Change-Id: Ib993d64056c1893588c779ea23d218d42a65e758
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1299843
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
a4612dc740 video: tegra: host: dla: use standard size defines
Use standard size definitions for better code readability.
Also move macro's to header files

Change-Id: Ie923cdc6ce4f0bb4d098dd3a3328f9cc232604e9
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1297216
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
31532aa01d video: tegra: host: dla: add GoS backing support
Update syncpoint based actions with GoS semaphores.

For post actions get both GoS and MSS sem address, for pre actions
use MSS sem if GoS sem is not available.

In postactions, write 1 to MSS memory and write current max + 1 to GoS
memory.

DLA-98

Change-Id: I6dbf850bc2c5b86c372ad963a30e9cfad1fc787f
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1283462
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
da29f3cd97 video: tegra: host: dla: remove updating user bufffer with IOVA
This patch addresses two fixes:
[1]
Removes updating user buffers with IOVA.
- In address translation of address list of a tasks, handle and
  offset were replaced with actual IOVA into user buffer and same buffer
  was shared with engine. This approach is error prone.
- To fix this issue, kernel keeps IOVA list and shares with engine.
- In task submit, mem_handle list from user and updated in kernel
  copy of task.
- and while pinning user buffers, engine shared list updated with
  actual dma address retrieved from submit pin call.

[2]
Remove dynamic allocation required in address translation
- Required memory of 'kernel copy address list' and 'engine shared
  address list' both allocated from queue memory pool.
- and assigned and released along with task data.

DLA-286

Change-Id: I4d5a322adaff25e6e587d3305847540757850c77
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1293124
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Mikko Perttunen
29973a70c0 video: tegra: host: Track nvhost API change
Nvhost power domain support has been refactored and
as part of that the function nvhost_module_add_domain
is no longer necessary and has been removed. Therefore
remove calls to this function from unit drivers.

JIRA HOSTX-156
Bug 1852328

Change-Id: Id5d404e40c301bccd531091622a92f359532b384
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: http://git-master/r/1284202
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Amit Sharma (SW-Tegra)
4eba150eec video: tegra: host: dla: add support for trace event
Add support for sending set_debug command to configure
trace events in firmware.
- Add new interface: dla_debug_config
- command interface for trace_event configuration

DLA-254

Change-Id: I6ea5c1c57f75891d4633839f0f82470d92109b8f
Signed-off-by: Amit Sharma (SW-Tegra) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1291925
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2023-04-14 11:46:40 +00:00
Amit Sharma (SW-Tegra)
d22f608f4b video: tegra: host: dla: add more options to dla debugfs
Add following details to dla debugfs:

1. To check firmware version
  - /d/nvdla*/firmware/version
2. To enable/disbale the dla firmware traces.
  - /d/nvdla*/firmware/trace/enable
3. To dump the data in readable format
  - /d/nvdla*/firmware/trace/text_trace
4. To dump the data in binary format
  - /d/nvdla*/firmware/trace/bin_trace
5. To set the categories of events
  - /d/nvdla*/firmware/trace/events/category
6. To get the help menu for setting the trace categories:
  - /d/nvdla*/firmware/trace/events/help

Rename API debug_dla_dump_show -> debug_dla_tracedump_show, and
move /d/nvdla0/fw_version -> /d/nvdla*/firmware/version.

DLA-225
DLA-254
DLA-199

Change-Id: I396b31102a1995e4deffdb6e03ab7377bb0b7fc3
Signed-off-by: Amit Sharma (SW-Tegra) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1291924
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
31b532c889 video: tegra: host: dla: use static array for copying user data
In IOCTL path, temporary handles are dynamically allocated which keeps
user data until it populated and used by driver for different
operations. This dynamic allocation in currently done for buffer pin,
task submit and buffer unpin.

As MISRA C guidelines, keeping minimal dynamic allocation and making
static allocation for temporary handles.

Jira DLA-283

Change-Id: I1589c6f96e674e74b4607614c035ef0a0606b7db
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1291492
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
bf348b16bd video: tegra: host: dla: correct engine cmd timeout
- Correct engine cmd timeout which was set to earlier to high value.
  Use timeout in msec.
- Bundle data into struct and pass pointer of data to avoid sending
  multiple parameters. This should help to add additional parameter in
  future.
- Remove un-used MACRO defines

Change-Id: If6bd9686b4e2dd38c65ba81d9ed05cf0dedf9a8c
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1286687
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
3a1e6b396b video: tegra: host: dla: remove dynamic kernel task mem alloc
- nvhost_queue_task_pool_alloc() also allocates kcalloc based memory.
  Use this memory to keep kernel copy of task and get this memory
  assigned during task submission. Release memory during task cleanup
  along with dma alloc.
- Memory pool free'd while freeing queue on device close.
- Using preallocated memory should help to improve performance of job
  submission.
- memset for dma and kernel memory done from queue common code, so
  removing memset for task descriptor memory.
- Fix releasing queue refcnt and release it after free task memory.

DLA-271

Change-Id: I711b3181e742c05e934f1c621b3dc6e5cf94b67c
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1285892
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Shridhar Rasal
b21abe34a7 video: tegra: host: dla: roundup task desc mem
Falcon requires IOVA to be 256 byte aligned.

task descriptor and command memory assigned from pre allocated pool,
which may not be correctly aligned.

Roundup task descriptor size to 256 to get correctly aligned address.
Keep max command size as 256.

Check alignment of IOVA after reserving from pool.

memset reserved memory to avoid corruption in case of re-use of pool
mem.

ALIGNED_DMA macro moved to include file and used for task submit
command.

Jira DLA-266

Change-Id: Id8a63ddad357a9ba905a975b565afca04e5d6806
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1282878
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Rohit Khanna
a40bcd8183 Revert "video: tegra: host: dla: add more options to dla debugfs"
This reverts commit e78adaae5f7b7eb23c466008a8225235187ec116.

DLA-254
DLA-199

Change-Id: I92845b7efded1ed9a9fa6dbaa0f2219dfa4c8fd4
Reviewed-on: http://git-master/r/1288311
Tested-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
2023-04-14 11:46:40 +00:00
Rohit Khanna
71117eca2f Revert "video: tegra: host: dla: add support for trace event"
This reverts commit 2065a3e6f1c273f1a60fcee17feedab40e23f96e.

DLA-254

Change-Id: Ic8b62febac145369a06a7b53d893e5a5ef088698
Reviewed-on: http://git-master/r/1288310
Tested-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
2023-04-14 11:46:40 +00:00
Amit Sharma (SW-Tegra)
f652305725 video: tegra: host: dla: add support for trace event
Add support for sending set_debug command to configure
trace events in firmware.
- Add new interface: dla_debug_config
- command interface for trace_event configuration

DLA-254

Change-Id: I5a4bdd93882e3e167da165f1dc1e2495b9c327c3
Signed-off-by: Amit Sharma (SW-Tegra) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1277594
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Amit Sharma (SW-Tegra)
0ee905be8e video: tegra: host: dla: add more options to dla debugfs
Add following details to dla debugfs:

1. To check firmware version
  - /d/nvdla*/firmware/version
2. To enable/disbale the dla firmware traces.
  - /d/nvdla*/firmware/trace/enable
3. To dump the data in readable format
  - /d/nvdla*/firmware/trace/text_trace
4. To dump the data in binary format
  - /d/nvdla*/firmware/trace/bin_trace
5. To set the categories of events
  - /d/nvdla*/firmware/trace/events/category
6. To get the help menu for setting the trace categories:
  - /d/nvdla*/firmware/trace/events/help

Rename API debug_dla_dump_show -> debug_dla_tracedump_show, and
move /d/nvdla0/fw_version -> /d/nvdla*/firmware/version.

DLA-254
DLA-199

Change-Id: Ia39c3af6a8d007504e28cd382ded886c4c713105
Signed-off-by: Amit Sharma (SW-Tegra) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1277525
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Prashant Gaikwad
d25d2c1ab9 video: tegra: host: nvdla: update os interface
Firmware minor version updated to 5

- Renamed task status notifier
- Added commands for trace events

Change-Id: Ie272b018b557369e288a8780cedcf67a2e08c250
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/1286009
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
2023-04-14 11:46:40 +00:00
Vinod G
d249225115 video: tegra: pva: Remove Dynamic kmalloc
Removing the kmalloc calls from the ioctl calls.
The kernel memory needed for task is allocated in
nvhost_queue_task_pool_alloc() call and on
pva_submit_ioctl() call, the
preallocated memory is assigned for tasks
based on availability and clear them on task
completion for reusing for other tasks.

JIRA PVA-189

Change-Id: Id5834e341da01cbc3af7ecdb318b707d0651f2ba
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: http://git-master/r/1275270
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00
Deepak Nibade
f8d356147e video: tegra: host: remove nvhost-18x include path
nvhost-18x path is deprecated, hence remove it's include path

Jira HOSTX-166

Change-Id: I41ccf34f86f7f8c8b23ef5f0d5fb101024becae3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1279478
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
206d951aa1 video: tegra: host: dla: check buffer count per task
To avoid possible buffer overflow, add check for max number of buffers
count per task. Min buffer check count was already present.

Bug 1806862

CID 38902

Change-Id: I48ef974ed8cbc0972a758b79fc3c525aed2b8478
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1281988
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
bf1ef90457 video: tegra: host: dla: fix coverity issues
fix coverity issue seen in ioctl argument usage.
Validate input arguments for arguments.
add missing error messages from pinning path.

Bug 1806862

CID 1806862
CID 38902

Change-Id: I025bedbd7060b7ffb7f908c0fb5e6f0d80710530
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1280084
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 11:46:40 +00:00
Shridhar Rasal
e8d89fcbf9 video: tegra: host: dla: add queue operations cmd
- define and add ioctl to set queue operations like, suspend and resume.
- on validating user argument, pass command to engine to suspend and
  resume.
- on receiving this command, firmware just update queue status as sent
  and doesn't interrupt ongoing task or queue work.

Jira DLA-218

Change-Id: I13f5d8822d920961277884c64534daaf64d812be
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/1278192
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-14 11:46:40 +00:00