When BWMGR is unavailable, BWMGR could be either unsupported and
disabled in BPMP firmware.
For unsupported state, MRQ_BWMGR_INT is not available to use.
For disabled state, MRQ_BWMGR_INT is available but sending any
MRQ_BWMGR_INT request will just get -BPMP_NODEV error code.
Add error handling logic to make min_freq and max_freq devfreq sysfs
nodes as read-only but still expose devfreq nodes, such as
available_frequencies, min_freq, and max_freq, to allow user space
apps to read information from.
Bug 5555075
Change-Id: Id7c2695765d3dfee148a0d1bc1f7b0552fe4b343
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3467128
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
When NV_TEGRA264_BWMGR_DEBUG_MACRO_PRESENT is not defined the build
fails and the following errors are seen ...
drivers/platform/tegra/tegra-bpmp-bwmgr.c:101:12: error:
‘tegra_bpmp_bwmgr_devfreq_target’ defined but not used
[-Werror=unused-function]
101 | static int tegra_bpmp_bwmgr_devfreq_target(struct device *dev,
unsigned long *freq, u32 flags)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/platform/tegra/tegra-bpmp-bwmgr.c:37:12: error:
‘tegra_bpmp_bwmgr_max_freq_notifier’ defined but not used
[-Werror=unused-function]
37 | static int tegra_bpmp_bwmgr_max_freq_notifier(struct
notifier_block *nb, unsigned long action, void *ptr)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fix this by ensuring the above functions are not defined if
NV_TEGRA264_BWMGR_DEBUG_MACRO_PRESENT is not defined.
Bug 5483386
Bug 5196455
Change-Id: Ie2b069d163a32220c95ffaba217ddea3686ba92b
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3461865
Reviewed-by: Johnny Liu <johnliu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This driver exposes EMC frequency control interface to user space via
linux devfreq framework.
Users could change EMC frequency to the frequency value from the
available frequencies of EMC clock:
$ /sys/class/devfreq/bwmgr# cat available_frequencies
665600000 2750000000 3200000000 4266000000
and update the EMC floor frequency by writing into the min_freq QoS
sysfs node:
$ /sys/class/devfreq/bwmgr# echo 4266000000 > min_freq
and update the EMC max frequency by writing into the max_rate QoS
sysfs node to cap the EMC frequency:
$ /sys/class/devfreq/bwmgr# echo 4266000000 > max_freq
This driver does not directly manage the EMC clock rate. Instead it
just delivers the min/max frequency information to BPMP, and BPMP is
still the only entity that has the full control of EMC and other
related memory clocks.
Bug 5483386
Bug 5196455
Change-Id: I6124eeb7411a13bde5c51582064534063abca8d3
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3453755
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
