Camera fsync signal Driver provides following features.
- Configures and runs TSC generator to provide fsync signal to the
camera module
- FSYNC signal is programmed as specified in DT for freq and offset
- Start time of fsync signal can be specified or default
value can be used
- Default value used will be 10ms in future
- If start time is provided, value must be provided in TSC ticks unit
- Read DT, if tsc-gen-groups are specified, init & expose node for
each group
- Each generator in group is configured
- IOCTL interface is exposed to accept start time and start the generator
- Sanity check is done to ensure, no generator is part of multiple groups
- Backward compatibility is maintained
JIRA CAMERASW-11902
Bug 3799488
Change-Id: I4f278eb95b8f85edb2d5e7664c9f2dd694437263
Signed-off-by: Mohit Ingale <mohiti@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2898373
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Add support for configurable interrupt timers and event notification
queues to SIPL Device Block to mirror the CDAC (QNX) pulse channel
interface.
The CDI_MGR_IOCTL_INTR_CONFIG IOCTL is added to set the timeout
duration at initialization, and existing GPIO interrupt code is
refactored.
Also removes the GPIO index limitation to the range of [0,31] by
returning the complete indices one at a time instead of a bit flag.
Jira CAMERASW-11100
Jira CAMERASW-11385
Jira CAMERASW-9366
Bug 3902416
Bug 3792904
Signed-off-by: Vincent Chung <vincentc@nvidia.com>
Change-Id: I62b6c0bd8be18922ab1fe5d40485a69274f2a18e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2893327
Reviewed-by: Semi Malinen <smalinen@nvidia.com>
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
