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113 Commits

Author SHA1 Message Date
Akhil R
8f0fcc68f0 crypto: tegra: Do not use IV for AES ECB 
It may happen that the variable req->iv may have stale values or
zero sized buffer by default and may end up getting used during
encryption/decryption. This in turn may corrupt the results or break
the operation. Ensure not use IV for algorithms like AES ECB where IV
is not expected.

Bug 4883011

Change-Id: I309ad26f99fe54005ff71b270b3b115dc62ac168
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3330469
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:18 +00:00
Akhil R
fc72250a45 crypto: tegra: Reserve keyslots to allocate dynamically 
The HW supports only storing 15 keys at a time. This limits the number
of tfms that can work without failutes. Reserve keyslots to solve this
and use the reserved ones during the encryption/decryption operation.
This allow users to have the capability of hardware protected keys
and faster operations if there are limited number of tfms while not
halting the operation if there are more tfms.

Bug 4883011

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I7de17eb1acf3b5a9f55a42e9df2aa8b64e20cb6d
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3347661
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
 2025-07-24 10:19:18 +00:00
Akhil R
e09a390449 crypto: tegra: Fix HASH intermediate result handling 
The intermediate hash values generated during an update task were
handled incorrectly in the driver. The values have a defined format for
each algorithm. Copying and pasting from the HASH_RESULT register
balantly would not work for all the supported algorithms. This incorrect
handling causes failures when there is a context switch between multiple
operations.

To handle the expected format correctly, add a separate buffer for
storing the intermediate results for each request. Remove the previous
copy/paste functions which read/wrote to the registers directly. Instead
configure the hardware to get the intermediate result copied to the
buffer and use host1x path to restore the intermediate hash results.

Bug 4883011

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I54952620906ccfd57d560c4619d17211f67b9ac3
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328440
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
 2025-07-24 10:19:18 +00:00
Akhil R
be083d7bc7 crypto: tegra: Transfer HASH init function to crypto engine 
Ahash init() function was called asynchronous to the crypto engine queue.
This could corrupt the request context if there is any ongoing operation
for the same request. Queue the init function as well to the crypto
engine queue so that this scenario can be avoided.

Bug 4883011

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I7d5e4629fbd47215c7d7748b675030c1cb63e5ea
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328439
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:18 +00:00
Akhil R
77c91508d5 crypto: tegra: finalize crypto req on error 
Call the crypto finalize function before exiting *do_one_req() functions.
This allows the driver to take up further requests even if the previous
one fails.

Bug 4883011

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I36ee3548159e96432e7d15b93f7ef688022dbc87
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328438
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:18 +00:00
Akhil R
f725f36d1e crypto: tegra: Use separate buffer for setkey 
The buffer which sends the commands to host1x was shared for all tasks
in the engine. This causes a problem with the setkey() function as it
gets called asynchronous to the crypto engine queue. Modifying the same
cmdbuf in setkey() will corrupt the ongoing host1x task and in turn
break the encryption/decryption operation. Hence use a separate cmdbuf
for setkey().

Bug 4883011

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: Ia6a5376e2c8dfc98e11414666ebf9ade41f10fee
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328437
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
 2025-07-24 10:19:18 +00:00
Akhil R
a628affd69 Revert "crypto: tegra: Use separate buffer for each host1x command" 
This reverts commit f75887b0c0e9340c3dd92b19dab99ed92f36bcb0.

Reason: To align with the upstream changes pushed as part of
https://lore.kernel.org/lkml/20250224091610.49683-1-akhilrajeev@nvidia.com/

Bug 4883011

Change-Id: If79728d00d3e8e3c8ad3e26a8170a7c1fa95414c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3347660
Reviewed-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Akhil R <akhilrajeev@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:18 +00:00
Nagaraj P N
61ec572ed1 vse: remove deprecated chip struct fields 
remove support for old chip

Bug 5091879

Change-Id: I911d81268b3485f2691548a116510d82e946e305
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3338859
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2025-07-24 10:19:18 +00:00
Nagaraj P N
5e58030479 vse: increase max support dev count to 70 
Bug 5091879

Change-Id: Ib5134b5fb3e41a369afcecad5dffe073bbb90363
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3324338
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
 2025-07-24 10:19:18 +00:00
Nagaraj P N
a45f684085 vse: allocate priv struct during init 
Also, update gmac crypto ctx free logic

Bug 4881474

Change-Id: I5e2f10814b3a1f41ff098f2c602ee2de431f6cf5
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3287699
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Ambika Prasad <ambikap@nvidia.com>
 2025-07-24 10:19:17 +00:00
Christophe JAILLET
6b5633fb93 crypto: tegra - Remove an incorrect iommu_fwspec_free() call in tegra_se_remove() 
The only iommu function call in this driver is a
tegra_dev_iommu_get_stream_id() which does not allocate anything and does
not take any reference.

So there is no point in calling iommu_fwspec_free() in the remove function.

Remove this incorrect function call.

Fixes: 0880bb3b00c8 ("crypto: tegra - Add Tegra Security Engine driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Tested-by: Akhil R <akhilrajeev@nvidia.com>
Acked-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

JIRA LINQPJ14-47

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I1d511caa5cff07b936d1f347c2768c43a6f1c1e3
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3328426
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Akhil R <akhilrajeev@nvidia.com>
 2025-07-24 10:19:17 +00:00
Khushi
62431fc5f3 VSE/Cryptodev: prefix driver name for driver print 
ESSS-1756
Signed-off-by: Khushi <khushi@nvidia.com>
Change-Id: I5f65e77cda381189f59cabad04d340e795f01021
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3315502
Reviewed-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:16 +00:00
Khushi
08f05cb80d vse: Add vaildation checks for Algorithms 
Bug 5058383

Change-Id: Ibeb1436938db0d87a5c4f99275aed6cec17dabe1
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3284860
Reviewed-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
 2025-07-24 10:19:15 +00:00
Nagaraj P N
f552a45569 cryptodev: update buf addr check for SHA requests 
Input buffer VA needs to be checked only for
non-zero copy IVC queues.

Bug 4999798

Change-Id: Ic8bcc44abb65f8e2d614f6734870e81a8d5ec03c
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3306711
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
 2025-07-24 10:19:15 +00:00
Nagaraj P N
965bd044c6 vse/cryptodev: add memory map/unmap interface 
- add support for zero copy SHA/GMAC operations
- add support to read zero copy nodes in DT
- support memory buf map/unmap ioctl interfaces
- unmap all memory buffers when FD corresponding
  to device node is closed.
- support only one open call at a time for zero
  copy nodes.

Bug 4999798

Change-Id: If110108a73b24ca9f523a8c67a47c02b922c3fd8
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3292084
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
 2025-07-24 10:19:15 +00:00
Khushi
69055dd639 vse:copy from/to user buffer only once in drivers 
Directly copy user buffer to/from IOVA buffer instead
of coping user buffer to kernel buffer in
Cryptodev driver and then copy the kernel
buffer to IOVA buffer in VSE driver

Bug 5058383

JIRA ESSS-1496

Change-Id: I5bc7fc209687052811c330893a272f558e6a122c
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3242512
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagaraj P N <nagarajp@nvidia.com>
 2025-07-24 10:19:14 +00:00
Khushi
f148b0cc15 Bug Fix: Memory leak for HMAC_SHA_SIGN_VERIFY 
Free hmac_sha_sv_ctl before releasing the lock

Bug 4881474

Change-Id: I8272ccb841e2cc156650bbfcecbddbdbc54c7f4a
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3292556
Reviewed-by: Nagaraj P N <nagarajp@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
 2025-07-24 10:19:14 +00:00
Khushi
2a114f31d6 Bug Fix: Intermittent failure in NvVseTestAES 
Fixed the issue caused by using common buffer in hwrng requests
which led to overwriting the buffer and mismatch during concurrent
AES operations

Bug Id: Bug 5015880

Change-Id: I52d6ae016fcc58cd9f2129d13d458d2ff9b3da59
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3273901
Reviewed-by: Suresh Venkatachalam <skathirampat@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Nagaraj P N <nagarajp@nvidia.com>
Tested-by: Christoffer Arvidsson <carvidsson@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
 2025-07-24 10:19:13 +00:00
Nagaraj P N
8e33949582 vse: update device nodes per hw instance/engine 
Update cryptodev device names to indicate the hw instance
and engine name.
Update implementation to allow different DT instance ids and
driver device instance IDs.

Jira ESSS-1692

Change-Id: Ib1cf91202b41276ac8342f820e170884d139090c
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3263604
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2025-07-24 10:19:13 +00:00
Nagaraj P N
9db0daab99 hv-vse: update err handling function 
update err handling function to return -EINVAL in case of
unrecognized error code.

Bug 5015473

Change-Id: I0aa07721541bf59cb4e8cd8554e545196251e38f
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3273654
(cherry picked from commit 3ac33a52485efc09054815b6824f43930de5c900)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3276070
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
 2025-07-24 10:19:12 +00:00
Khushi
9aae5199d7 vse: allocate buffer during init 2 
TSEC CMAC SV
RNG
HMAC SV
CMAC SV HW verify
GCM Enc/Dec HW verify
GMAC SV HW verify

JIRA ESSS-1495

Change-Id: I9cabee686d99d3c94d46e2a72d51151ae62e7630
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3227547
Reviewed-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
 2025-07-24 10:19:11 +00:00
Akhil R
a49c68b4e2 crypto: tegra: Use separate buffer for each host1x command 
Allocate separate buffer for each host1x command. The single buffer used
for host1x commands can get corrupted when independent crypto operations
overlap.

Bug 4883011

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I43029364c8e65e5014a5b7068cb45225c039aaf8
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3251597
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:10 +00:00
Nagaraj P N
13859c153d vse: use new req format for tsec sign request 
Jira ESSS-1569

Change-Id: I284c648bb9b171d65cfb2c45386df40ac7d3f123
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3206645
(cherry picked from commit 1077db9ad07b6db001b0cdfdd9bda86125926e9a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3224563
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Rounak Agarwal <rounaka@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
 2025-07-24 10:19:10 +00:00
Rounak Agarwal
84c1be5f3c vse: Changes for TSEC batch request 
JIRA ESSS-1560

Change-Id: Ie76afb6eed36e12d4ff42d793afc3c4ccc73b010
Signed-off-by: Rounak Agarwal <rounaka@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3206546
(cherry picked from commit 89d290edcbe70ad734ba23deb5021d16ae116b05)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3224562
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2025-07-24 10:19:10 +00:00
Nagaraj P N
74e8b62f72 vse: sha: implement new sha_update API 
- Initialize lock per device node and take lock at the
  start of processing of each ioctl command. This is needed
  because there is only one set of IOVA buffers allocated
  during init per device node. Without lock it leads to
  race conditions when more than one app uses the same
  device node.
- Release tfm after each API call for both sha and hmac-sha
- Validate rng buffer size provided by user
- Support buf size up to HW supported limit for GCM-Dec req
  if tag verify is supported by HW.

Jira ESSS-1517
Bug 4881474

Change-Id: I338558656ac00b91750e74990bb47c5a35f31e08
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233377
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
 2025-07-24 10:19:10 +00:00
Jon Hunter
9410c97b90 crypto: tegra: Fix build for Linux v6.11 
In Linux v6.11, the 'platform_driver' structure 'remove' callback was
updated to return void instead of 'int'. Fix the build for Linux v6.11
by simply removing the 'remove' callback for the Tegra SE KDS driver
because it does nothing.

Bug 4749580

Change-Id: Ic335005a99ff7387053bfb78c994bbabafba7b81
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3242554
Reviewed-by: Akhil R <akhilrajeev@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
 2025-07-24 10:19:10 +00:00
Khushi
e57f71b4d0 vse : GCSE1/2 AES Linux 
Added engine id in linux vse driver for GCSE1/2 AES0/1
Jira ESSS-1413

Change-Id: Icb38941c2c17e04fe0979070c80abaac9d018e74
Signed-off-by: Rounak Agarwal <rounaka@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3168936
Tested-by: Khushi . <khushi@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
 2025-07-24 10:19:10 +00:00
Akhil R
a29b51cd58 crypto: tegra: Add Tegra SE driver for T264 
Add Tegra Security Engine driver which supports AES-ECB/CBC/CTR/XTS
SHA1/SHA2/SHA3 AES-GCM, AES CCM, SM4, SM3 algorithms.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I86be2fcc485c31988496395183cb44a386907668
 2025-07-24 10:19:09 +00:00
Akhil R
f01dd75c1b crypto: tegra: Fix size of buffer allocated 
Allocate the buffer based on the request instead of a fixed buffer
length. In operations which may require larger buffer size, a fixed
buffer may fail. Similar patch was added for AES algorithms. Fix the
same for HASH algorithms as well.

Bug 4908156

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: Idd2c1ceae1a85434a5a51154a17dce8c927bb66c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233718
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:09 +00:00
Khushi
c68a2ed191 vse: GCSE1/2 SHA Linux 
JIRA ESSS-1400

Change-Id: Ie18857f05275cf8063d735526079d815b62c76fb
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3221278
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2025-07-24 10:19:09 +00:00
Nagaraj P N
71ccb24bdc vse: hmac-sha: return error for hash mismatch 
Jira ESSS-1632

Change-Id: Ib879b67f360750ca7a3961aee6740d8dcb411513
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3231084
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2025-07-24 10:19:08 +00:00
Jon Hunter
f01227d4ea drivers: Drop inline from driver remove wrapper 
The driver remove function is a function pointer and therefore, it does
not make sense to define the function as an 'inline'. Update the
coccinelle script and drivers to remove the inline statement.

Bug 4749580

Change-Id: Ia03691b75c4edffe609f27468b911a92a5ddbd68
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233980
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2025-07-24 10:19:08 +00:00
Nagaraj P N
bc6885d338 vse: allocate dma buffers during driver init 
Use dma_alloc_coherent to allocate DMA buffers during probe
instead of on per request basis for SHA/AES requests.

Bug 4637856

Change-Id: I1321b224c61d2f0cda559525b7806504943a81d7
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
(cherry picked from commit ef746fdaec135d114ce04cb7418230c86c8746c1)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3213894
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Khushi . <khushi@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
 2025-07-24 10:19:07 +00:00
yong zhang
7af5789560 nvvse: Extend DRNG data length range 
- From 512 to 1024

JIRA MAKO-8039
Bug 4839934

Change-Id: Ie949b2abe549174a3c2872aa2daecc9d72de9e8b
Signed-off-by: yong zhang <yongz@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3197637
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: Ian Reid <ireid@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:07 +00:00
Akhil R
d789effad6 crypto: tegra: Fix size of buffer allocated 
Allocate the buffer based on the request instead of a fixed buffer
length. In operations which may require larger buffer size, a fixed
buffer may fail.

Bug 4798264

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I0eac3e04aed89b07f5674cf69828d3ac0801a6c7
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3194058
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
 2025-07-24 10:19:06 +00:00
Yash Bhatt
4a1b0df1df crypto: Fix stack frame size exceeded error in fuzzing build 
Enabling KASAN is causing stack frame size exceeded error in crypto
driver, Fix this by allocating struct get_ivc_db dynamically while
enabling KASAN for fuzzing build.

Bug 4615347

Change-Id: Ie1959b3c79c8ca2f31f79ea76aeb55490bd9917b
Signed-off-by: Yash Bhatt <ybhatt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3196965
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2025-07-24 10:19:06 +00:00
Nagaraj P N
ff7c18fc0b vse: add mempool support for GCM decryption 
Jira ESSS-359

Change-Id: I1e49b331ec5be2bde208ae0fcac40d7af2fd082a
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3132632
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3191163
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2024-08-16 10:52:17 -07:00
Nagaraj P N
97434deea4 vse: add support for SM4 GMAC 
Jira ESSS-1417

Change-Id: Ica5cdb08f04e75fba50badb9bd3342f2cd2004b9
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3172038
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-08-14 17:48:41 -07:00
Prashant Parihar
afb2145beb nvvse: Enable SM4 CMAC support 
Jira ESSS-1409

Change-Id: Ib13b2901cbec8e4b9670fbe43960514e614a60c0
Signed-off-by: Prashant Parihar <pparihar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3170104
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-08-14 17:48:31 -07:00
Jon Hunter
951b2423a8 drivers: Fix platform_driver remove for Linux v6.11 
In Linux v6.11, the 'platform_driver' structure 'remove' callback was
updated to return void instead of 'int'. Update all the impacted drivers
as necessary to fix this.

Bug 4749580

Change-Id: I3bb5c549777f7ccad0e3f870373fdd25726ad7ed
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3182878
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Tested-by: Brad Griffis <bgriffis@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2024-08-11 17:20:34 -07:00
Prashant Parihar
a21f30c983 nvvse: Add SM4 implementation 
- Add VSE driver and crypto driver changes for SM4
CBC/CTR functionality
- Utilize existing function for AES CBC/CTR for SM4

Jira ESSS-1409

Change-Id: Ifaab10dd81c33b047554c28a37c399a3cb0d3419
Signed-off-by: Prashant Parihar <pparihar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3143320
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
 2024-07-28 12:47:58 -07:00
Bitan Biswas
cba663d0db crypto: fix crypto_engine_ctx build error 
struct crypto_engine_ctx removed in k6.6 hence use
conftest helper based macro to select updated data types

Bug 4346767

Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Change-Id: Iaf565c4ef74fdd87ea0020b369bc3d882d32326e
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3176823
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
 2024-07-25 06:13:35 -07:00
Akhil R
abb0a027b2 crypto: tegra: Align with upstream 
Fix the known bugs in the SE driver and align the driver with upstream
add Makefile flags so it will build SE driver for v6.1 or less

Bug 4488964

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Change-Id: I6efa471b6efcd161d36167a0784185f3e0266d7c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3124250
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2024-07-25 06:13:31 -07:00
Nagaraj P N
0b77774c92 vse: Add support for HMAC SHA Sign/Verify 
Add support for both old and new chip

Jira ESSS-1336
Jira ESSS-1371

Change-Id: Ie4010bc7f3d8f3b71e3f49197c21911cd11a6dea
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3144907
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
 2024-07-17 06:01:20 -07:00
Pranjal Singh Mandloi
f95a7d53c4 NVVSE: GCM/GMAC Linux changes 
Jira ESSS-1378

Change-Id: Ie47a432c73cc99ae209fb4b61dfc0acbe399aaff
Signed-off-by: Pranjal Singh Mandloi<pmandloi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3163800
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-07-13 21:37:56 -07:00
Nagaraj P N
e9f3b6f0aa vse: rng: allocate buffer in generate callback 
Allocation within init function cannot be performed as the
context structure does not have the node_id info populated
yet by cryptodev which causes the DMA buffer to be allocated
for the wrong engine/SID.

ESSS-1402

Change-Id: I58435cbe381812dfa314d86e6e46ee1e7ff77d0d
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3167473
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-07-08 15:58:27 -07:00
lchiu
d2a5a35cfe vse: support 64 bit keyslot for tsec 
Bug 4620571

Change-Id: Iea2f42167245308348a0a50e9fde14036c3f0736
Signed-off-by: lchiu <lchiu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3130036
(cherry picked from commit ba8f79f3e14b755ebb99464de2ff8d1c2d173e24)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3140529
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-07-06 00:07:00 -07:00
Khushi
b7a1a14256 NVVSE SM3 Implementation 
Implements SM3 in NVVSE crypto driver linux
ESSS-1346

Change-Id: I9f8b9bc18d7c30d8dac04e8f19941ef061aa8478
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3131643
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 2024-07-04 09:23:09 -07:00
Ashutosh Patel
2cda57413f NVVSE: Enable Linux IVC_DB Bringup 
Changes:
    - Enabled Linux IVC_DB changes
    - Added Host1x compatible string

Jira ESSS-1389

Change-Id: I3032db25b53e230693813fb3bb096d59bafec7e9
Signed-off-by: Pranjal Singh Mandloi<pmandloi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3154005
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
 2024-06-24 11:09:42 -07:00
Khushi
df2a7fda9c CMAC for Linux 
CMAC implementation for 64 bit addressing
Remove unsupported legacy cmac function
Implemented CMAC for new chip

ESSS-1375

Change-Id: I43bc4a03b03a5914ab1e4656bef90ad179744f1a
Signed-off-by: Khushi <khushi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3146556
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Tested-by: Pranjal Singh Mandloi <pmandloi@nvidia.com>
 2024-06-22 07:43:34 -07:00