Configure BAR and MSI for Thor.
Add checks for chip id for chip specific code
between Orin and Thor.
Separate Stream ID's are assigned to upstream and downstream
struct device in Rootport client driver.
While accessing Rootport local memory upstream Stream ID should be used.
While accessing memories over BAR downstream Stream ID should be used.
Jira NVIPC-2877
Jira NVIPC-2484
Change-Id: I67df4b78e57b6de36f9bfaf966978f7ee875d596
Signed-off-by: Deepak Badgaiyan <dbadgaiyan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3226748
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
Reviewed-by: Janardhan Reddy AnnapuReddy <jreddya@nvidia.com>
Reviewed-by: Sivagamy Govindasamy <sivagamyg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
nvscic2c enables xfer between two SoC connected over PCIe.
nvscic2c already available with K5.10
Major changes in nvscic2c-pcie for K5.15:
Integrate with upstream PCIe endpoint function changes.
Allocate new IOVA domain to be used for
empty IOVA allocation.
This IOVA range would be used in iommu_map() to map
physical backing with IOMMU domain attached in PCIe device.
Migrate from nvhost to host1x and tegra-drm interfaces.
Bug 3739487
Jira C2C-826
Jira C2C-830
Change-Id: Ic4d8ac680921807fb17247855ca7037623681cb7
Signed-off-by: dbadgaiyan <dbadgaiyan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2810806
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Arihant Jejani <ajejani@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
