In simulation platform enabling hrtimer fence polling
is causing kernel to block/unresposive.
This issue is not observed in sillicon platforms.
As per this CL making following changes.
1. Added flag for kernel Thread polling.
2. Enabling HRTimer fence polling for silicon platform.
only.
Bug 5094695
Change-Id: I011900e9299be71413c92952d447e53abfd34128
Signed-off-by: amitabhd <amitabhd@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3297995
Reviewed-by: Leslin Varghese <lvarghese@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Raghavendra Vishnu Kumar <rvk@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
OpenRM maps the buffer with remap_pfn_range and then it's user VA is
passed to libnvrm_mem to create a handle out of it. NvMap uses
get_user_pages to get user pages from the VA. It fails for the buffer
mapped with remap_pfn_range. Hence use follow_pfn/follow_pfnmap_start
functions to obtain pfn from the VA and then obtain page pointer from
it.
Bug 5007238
Change-Id: I45a6ede6b5f164e537f014d9db3475b4c6d89307
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3298720
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Lakshmanan Selvi Muthusamy <lm@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
In Orin and previous chipsets, engine timestamp counter
runs 32 times faster than CNTVCT register, so the actual
timestamp is obtained by right shifting with factor of 5.
In Thor onwards, this shift is not required is for VIC engine.
Jira HOSTX-5905
Change-Id: I69980fdfcf50b15db99b1fbad522aecd571a0f17
Signed-off-by: Mainak Sen <msen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3306825
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This change removes the check in tsec comms part of dce
which blocks sending more than 1 command to tsec fw for the
same unit. This is to let the display driver force send
command to tsec fw when it is in the middle of a command
to inform it about certain events ex: hotplug. Tsec driver
should trust that display driver is doing checks when sending
the command to tsec fw.
Bug 5008088
Change-Id: Id765c558a8350c501466685d3894a2c8349550eb
Signed-off-by: spatki <spatki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3288182
Reviewed-by: Nikesh Oswal <noswal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
using this patch fixing below cert & misra errors:-
- misra_c_2012_rule_21_2_violation: "__UAPI_NVHVIVC_MEMPOOL_IOCTL_H__", an identifier or macro name beginning with an underscore, shall not be declared.
- misra_c_2012_rule_21_1_violation: Defining or undefining a reserved name "__UAPI_NVHVIVC_MEMPOOL_IOCTL_H__", which is an identifier or macro name beginning with an underscore.
- cert_dcl37_c_violation: The reserved identifier "__UAPI_NVHVIVC_MEMPOOL_IOCTL_H__", which is reserved for use as identifiers with file scope in both the ordinary and tag name spaces, is defined.
JIRA ESLC-8398
Change-Id: I82aca2a1c87ee4d2a145671ea0284fe739cb9b16
Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3297795
Reviewed-by: Suresh Venkatachalam <skathirampat@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
using this patch fixing below cert & misra errors:-
- cert_dcl37_c_violation: The reserved identifier
"_UAPI_TEGRA_HV_VCPU_YIELD_IOCTL_H_", which is reserved for use as
identifiers with file scope in both the ordinary and tag name spaces,
is defined.
- misra_c_2012_rule_21_1_violation: Defining or undefining a reserved
name "_UAPI_TEGRA_HV_VCPU_YIELD_IOCTL_H_", which is an identifier or
macro name beginning with an underscore.
- misra_c_2012_rule_21_2_violation: "_UAPI_TEGRA_HV_VCPU_YIELD_IOCTL_H_",
an identifier or macro name beginning with an underscore, shall not be
declared.
JIRA ESLC-8378
Change-Id: I1d8d5f437793a0b964b1ed195f70ab84c6104895
Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3301267
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Suresh Venkatachalam <skathirampat@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
using this patch fixing below cert & misra errors:-
- cert_dcl37_c_violation: The reserved identifier "_TEGRA_HV_PM_CTL_H",
which is reserved for use as identifiers with file scope in both the
ordinary and tag name spaces, is defined.
- misra_c_2012_rule_21_1_violation: Defining or undefining a reserved
name "_TEGRA_HV_PM_CTL_H", which is an identifier or macro name
beginning with an underscore.
- misra_c_2012_rule_21_2_violation: "_TEGRA_HV_PM_CTL_H", an identifier
or macro name beginning with an underscore, shall not be declared.
JIRA ESLC-8381
Change-Id: Ib944855e143c34b3019f1f93ad9f6894ebf89085
Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3301268
Reviewed-by: Suresh Venkatachalam <skathirampat@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Add a few microseconds delay between IVC channel reset retries.
This prevents kernel logs from flooding if dce bootstrapping takes
some time for any reason.
Based on logs below, DCE is taking around 10-30 microsecond for channel reset.
So, Keeping the delay of 10-20 microseconds.
20:26:46.637409: dce: dce_mailbox_set_full_interrupt:157 Intr bit set multiple times for MB : [0x5]
20:26:46.637421: message repeated 15 times: [ dce: dce_mailbox_set_full_interrupt:157 Intr bit set multiple times for MB : [0x5]]
---
20:26:46.637429: dce: dce_mailbox_set_full_interrupt:157 Intr bit set multiple times for MB : [0x1]
20:26:46.637458: message repeated 12 times: [ dce: dce_mailbox_set_full_interrupt:157 Intr bit set multiple times for MB : [0x1]]
----
20:26:46.637461: dce: dce_mailbox_set_full_interrupt:157 Intr bit set multiple times for MB : [0x2]
20:26:46.637471: message repeated 15 times: [ dce: dce_mailbox_set_full_interrupt:157 Intr bit set multiple times for MB : [0x2]]
Jira TDS-6381
Change-Id: I0f8d3c55058019df5a52edd232eae93b3bf84276
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3304216
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
- add support for zero copy SHA/GMAC operations
- add support to read zero copy nodes in DT
- support memory buf map/unmap ioctl interfaces
- unmap all memory buffers when FD corresponding
to device node is closed.
- support only one open call at a time for zero
copy nodes.
Bug 4999798
Change-Id: If110108a73b24ca9f523a8c67a47c02b922c3fd8
Signed-off-by: Nagaraj P N <nagarajp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3292084
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Leo Chiu <lchiu@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
There are debug/duplicate APIs like NvRmMemGetIVCId,
NvRmMemHandleFromIVCId, NvRmMemWrite etc. which don't have corresponding
requirements in DriveOS 7.0 Linux NSR. We have taken sign-off from the
stakeholders to confirm that they are not using these APIs in T264 Linux
Prod NSR variant. But some of them are using these APIs in dev-nsr and
did not agree to remove it from dev-nsr, L4T, HOS etc. Hence we need to
make sure that they do not accidentally start using these APIs. Hence
add following DT based disabling support.
- Add disable-debug-support property in tegra-carveouts DT node in T264
prod nsr dts.
- Parse this DT node in nvmap and if the above property is present then
BUG_ON in the ioctl functions corresponding to these APIs.
Bug 4980348
Change-Id: Icdd5aadf3197d0649b61d285f433fa65ea69e806
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3298507
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Ashish Mhetre <amhetre@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
- Added UID member to nvsciipc_config_entry data
structure. this is needed for implementing
test_nvsciipc_cfgblob in linux.
- removed static from ioctl function to attach eBPF program
- add error-injection.h and ALLOW_ERROR_INJECTION macro to ioctl
to use bpf_override_return()
JIRA NVIPC-2817
Change-Id: Ic27156e321368041f41fbabff9e6375140fe1d0e
Signed-off-by: Suneel Kumar Pemmineti <spemmineti@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3301786
Tested-by: Joshua Cha <joshuac@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Simon Je <sje@nvidia.com>
When pva recovery is initiated due to command or
task submit timeout or initiated by pva-fw, queues
are cleared and tasks returned with error among other
cleanup activities and pva reset and fw reboot.
There could be multiple concurrent attempts to recover
the PVA engine. Additionally, task and command submit
may be at varying stages of execution.
- Skip recovery requests while recovery work is pending.
- Skip task removal in case of timeout or invalidated task
during task submit.
- Skip task submit to CCQ if task was removed during abort.
- Guard against concurrency during recovery
- Re-attempt pva reboot on fail during boot except in recovery.
- Reset driver PM state if module busy fails and PM error is set.
- Set default FW trace mask to WARN+ERROR+BOOT
- Set default driver log mask to FW TRACING
- ccq polling routine exits with timeout if abort is active
Bug 4944591
Change-Id: Id3a7388700ccada135b568c978176bb9f2c5f8a0
Signed-off-by: omar <onemri@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3284303
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com>
In order to test hypothesis that severe system loads are causing
erroneous timeouts on command submit and task submit, polling
loop and event wait functions are changed to check for true timeout.
-- dump out FW traces on abort outside ISR.
-- add debug fs node to override driver timeout in mailbox wait event
and ccq wait event.
-- add device info dump on abort.
-- dump queues
Bug 4944591
Change-Id: Iea78131016e0913d909f504272a6370bb37c35db
Signed-off-by: omar <onemri@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3259651
Reviewed-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Fix for: Sparse defects
Sparse stated that:
-symbol 'tegra_vpr1_dev' was not declared. Should it be static?
-symbol 'tegra_vpr_cma_dev' was not declared. Should it be static?
-symbol 'tegra_generic_cma_dev' was not declared. Should it be static?
-symbol 'tegra_vpr_dev' was not declared. Should it be static?
-symbol 'tegra_generic_dev' was not declared. Should it be static?
Making all the above functions static since it is being used in nvmap_init.c only.
Bug 4513982
Change-Id: I4887d994d9ae852a4faa7da735c18d25b393187a
Signed-off-by: Surbhi Singh <surbhis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3295831
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
