Make use of ARCH_TEGRA_210_SOC instead of ARCH_TEGRA_21x_SOC
so that we can get rid of redundant ARCH_TEGRA_21x_SOC.
ARCH_TEGRA_210_SOC aligns to up-stream as well.
Bug 1766370
Change-Id: I10a9d9bb63b1fbac358d85a228710a208d595281
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-on: http://git-master/r/1306757
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Expose mixer controls for i2s sample rate, channel and
channel conversion in rx/tx i2s cif. This is required
to support routing of audio to codec from i2s6.
Bug 1792012
Reviewed-on: http://git-master/r/1227399
(cherry picked from commit 76118138b12220a2cdf25d44fd58fcd83090577c)
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Change-Id: I4e5471b7ca8fcf6d72ab2e0e27ed16b6adb8c94d
Reviewed-on: http://git-master/r/1201220
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
fixing kernel warnings of the form
"tegra210-i2s tegra210-i2s.[0-9]+:
Missing prop fsync-width for I2S
Either we can set the property to a value of 31
or we can make these dev_warn as dev_info.
We are going with the second option.
Bug 200178609
Change-Id: I29285925a8a88ab8119ec655133462b0714c5092
Signed-off-by: Gaurav Singh <gaursingh@nvidia.com>
Reviewed-on: http://git-master/r/1207583
(cherry picked from commit c2bf779f429f5fb02a787026bcc99a22e7a647b4)
Reviewed-on: http://git-master/r/1210057
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
This commit has changes needed for audio on kernel 4.4
- select SND_DYNAMIC_MINORS for tegra-alt
- use snd_soc_new_compress callback function in snd_soc_dai_driver
instead of setting compress_dai = 1
- use snd_soc_dapm_to_codec() to access codec from widget
Bug 200193757
Change-Id: I1744ca93786086691cb6eabdde33125a995de9e7
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/1158639
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
i2s clock is required to be configured
only when controller is programmed as master.
Also when clock source is sync clock need to
program the sync clock selector to pick correct
external clk.
Bug 1747842
Change-Id: Iadddebb21f7b0990114f4ad25093638ab996ce9f
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1139580
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Tested-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Nitin Pai <npai@nvidia.com>
Added support in i2s driver to have an option
to drive an i2s in master mode from another
i2s sync clock
Bug 1733691
Change-Id: I2f2b7bbdbbdf8af97e6aef4563d5729b8f2d8c52
Signed-off-by: Sidharth <svarier@nvidia.com>
Reviewed-on: http://git-master/r/1118980
Reviewed-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Nitin Pai <npai@nvidia.com>
Moving sw-reset at PRE_PMU stage where we
reset i2s controller it start of playback/
capture to clean up fifo's in case last run
was not good.
Bug 1736992
Bug 200181219
Change-Id: I716eb736242440360dc1e13426a69adfac08c6ed
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1112855
Reviewed-by: Nitin Pai <npai@nvidia.com>
Audience require 32 bits/channel for power optimized routes.
Added k-control to update 12S bit width. This change will also take care
of converting XBAR_BITS to CLIENT_BITS by padding zeros from LFSR to LSB
DAI format is hardcoded to 32 bits in Audience codec driver.
Bug 200118587
Change-Id: I3cf35977e8ba57d83084bd86ae6a2720a6acde7e
Signed-off-by: Srinivas Anne <sanne@nvidia.com>
Reviewed-on: http://git-master/r/830893
(cherry picked from commit a7b79a1b71e4e11cad1fb323e8ccbcd42894a2a0)
Reviewed-on: http://git-master/r/832487
Reviewed-on: http://git-master/r/1028395
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Move register store/restore from pm API's to
runtime API's for platforms, with CONFIG_PM_SLEEP
not enabled, to work.
Bug 200166409
Change-Id: Ifcdd78206b3ac59edc8ba1279316cfa8c87e7204
Signed-off-by: Uday Gupta <udayg@nvidia.com>
Reviewed-on: http://git-master/r/932101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
add check for context pointer before accessing it in suspend.
Also move setting of driver data at the end of probe function.
Change-Id: I5724ee810dd3ca409412aa21d61d35519b1432a3
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/921743
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
- rx soft reset should be set for playback case
and tx soft reset for capture case
- make soft reset registers writable by regmap
Change-Id: I840332e9ae30506c16c22ad423dc5e264188a858
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-on: http://git-master/r/818828
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
Tested-by: Nitin Pai <npai@nvidia.com>
Use the devm_clk_put function instead of clk_put i
to avoid kernel panic when clk_get fails
Bug 1687658
Change-Id: I2ab31667dfdec4298d87a9a1d2d427954880b41d
(cherry picked from commit 2874a4278430d482b0309b954c36e7300807f9ae)
Reviewed-on: http://git-master/r/802540
Signed-off-by: Asha T <atalambedu@nvidia.com>
Reviewed-on: http://git-master/r/807794
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Add the common clock framework support changes to audio drivers.
the change replaces the clk_get_sys() with devm_clk_get()
Bug 200127320
Change-Id: Ie97b127b302c6e7806b60dc4c11986acb1694525
(cherry picked from commit 8730fbc8a2cfee13229fed9ded529c62c7fc9eee)
Reviewed-on: http://git-master/r/792739
Signed-off-by: Asha T <atalambedu@nvidia.com>
Reviewed-on: http://git-master/r/807788
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
In k3.18 snd_soc_kcontrol_codec should be used to access
codec instead of snd_kcontrol_chip
Bug 200123169
Change-Id: I5bfdb7ebbbe601df9d580727be00786617abab3f
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-on: http://git-master/r/784591
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Make modifications, so that powergate partition-id for APE
is always read from device tree.
Bug 200105664
Change-Id: I10d3632a4bdaf2b37690f19be82c5431c0c71c7c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/730743
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/763551
GVS: Gerrit_Virtual_Submit
1. Remove replicate bit and add fifo_size_downshift bit
in cif
2. Update mask value for dma_fifo_size, dma_fifo_start_addr
and dma_fifo_threshold in admaif driver
3. Update the copyright
4. Add run time check function to detect FPGA
Bug 1582514
Bug 1582510
Change-Id: I40a8172ebc3713ead4cb5764f291f04d548c7a75
Signed-off-by: Junghyun Kim <juskim@nvidia.com>
Reviewed-on: http://git-master/r/751602
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Tested-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
- removed snd_soc_codec_set_cache_io function
- use snd_soc_kcontrol_codec instead of snd_kcontrol_chip
- use codec->component.val_bytes instead of codec->val_bytes
- use devm_ioremap_resource instead of devm_request_and_ioremap
- snd_soc_dapm_mux_update_power prototype is changed
Change-Id: Ieb699a0e8a12b341c6823337ef2deb0d99292240
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
I2S_CYA register is a spare register reserved for any issue
in design. I2S4 has "i2s4a" and "i2s4b" pins in the pinmux.
In order to select i2s4b pin for I2S4 instance, we need to
enable CYA register
Bug 1602439
Change-Id: I42c401a301efb648e1141159367038a084718a93
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/677018
(cherry picked from commit ecae3a30ba4bd9333872f1aff6e6215169fd16d0)
Reviewed-on: http://git-master/r/679674
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Justin Kim (SW-TEGRA) <juskim@nvidia.com>
Reviewed-by: Uday Gupta <udayg@nvidia.com>
Set default register values for AHUB modules in regmap. This will
ensure after runtime suspend/resume AHUB register POR values
does not get reset to 0.
Bug 200039212
Change-Id: I38e4c04721450b7511404c0db2911b314b68a880
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/603339
Set idle_bias_off for all t210 xbar modules to ensure module runtime
suspend/resume works when module is idle.
Ensure regcache is synced back to hardware during runtime resume so
that register content does not get lost if it is written during
runtime suspend state.
Add suspend APIs for all module to mark regcache dirty while device
goes into suspend to ensure register values does not get lost across
system suspend/resume.
Change-Id: I2828beeed859df4f8084dd70bbcde5ed62f2525c
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555028
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit
Instead of using duplicate clock of "d_audio" for all AHUB modules
get/put runtime pm reference of the parent module from runtime_pm
suspend/resume routine of all AHUB modules. This will ensure AHUB
xbar is up before other drivers tries to access any register. Also
it will ensure both d_audio and APE clocks are enabled when needed.
Bug 200042312
Change-Id: I0346728f15b135bb619de40fbd3fc440a5505940
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/554863
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit
When using RBTREE cache, there can be allocations the first time
a register is accessed. This can cause an attempt to schedule while
atomic in the case that the regmap is using a spinlock. This can be
resolved by using a flat cache.
Bug 200041820
Change-Id: Id69592cd5fadbb5ad9ccfdbb1f184733a332512c
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/552940
1. Add link name to platform data for unique
identification of the dai link
2. Remove set_sysclk from I2S and retreive
srate from params
3. Try to retrieve fsync-width from DT file,
if not default as 31
4. Add mono channel support in FSYNC mode
in machine driver
5. Fix dai_link_idx API to get link_idx
from unique name identifier
6. Add tdm_slot mask API for tx/rx mask settting
7. Initialize the DAPM dai link work struct for
non-pcm dai-links to avoid kernel crash
during powercycle in low power mode.
8. Add slot_size for AMX and ADX
9. Add clk_out_rate for 8kHz in automotive machine driver
Bug 1442940
Change-Id: Iaebdd7e12b8490021a9034afa351cdbc1d1d5d38
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Signed-off-by: Junghyun Kim <juskim@nvidia.com>
Reviewed-on: http://git-master/r/500553
I2S MBIST comes up in random state and therefore
SLCG needs to be toggled OFF and ON before the I2S
controller can be used normally.
This patch implements WAR in response to SLCG notifier.
- Set I2S controller in master mode.
- toggled I2S SLCG OFF and ON.
Bug 200035860
Change-Id: I17b727034a33adf12f64eed0673665f26f4267c0
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/538402
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
1. Add I2S data offset based on the operational mode
2. Initialize the edge control and LRCK polarity based on DAIFMT
Bug 1540017
Change-Id: I0ceb461f94ad0ac1f5e134054080e83f526355e9
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/451182
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Tested-by: Dara Ramesh <dramesh@nvidia.com>
This change is for adding dap-io regulator support for i2s
devices through device tree.
Change-Id: Ie34a61459c3ff282835a9ae3b1d49e13194da33a
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/448787
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
This change is for adding dap pinmux support for i2s
devices through device tree.
pinmux states (tristate enable/disable) are dynamically
controlled based on PM runtime state.
bug 200016630
Change-Id: I63cda853a6e20858984b14d6111697edec1b66f1
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/432150
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
