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2 Commits

Author SHA1 Message Date
Santosh BS
26b1cb4a82 drm/tegra: nvhost support for t264 
- VIC RISC-V EB boot support
- Programming sequence modification needed for Thor
- Reloc block linear addressing not needed for t264

Bug 4132685

Signed-off-by: Santosh BS <santoshb@nvidia.com>
Change-Id: I8ad47cce31cfd06020e33d3457a0d674a11e4d49
 2025-07-24 10:19:09 +00:00
Mikko Perttunen
2e8de96526 drm/tegra: Add code for booting RISC-V based engines 
Add helper code for booting RISC-V based engines where firmware is
located in a carveout.

Bug 3778105

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I36eda4774838fc73098bcf2eff8c3f1983c82465
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2771768
(cherry picked from commit cc6935ec1dc1e6557f5e0a7d53ef9f0c3ff12fb3)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2759060
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
 2023-04-03 09:18:59 +00:00