Configure BAR and MSI for Thor.
Add checks for chip id for chip specific code
between Orin and Thor.
Separate Stream ID's are assigned to upstream and downstream
struct device in Rootport client driver.
While accessing Rootport local memory upstream Stream ID should be used.
While accessing memories over BAR downstream Stream ID should be used.
Jira NVIPC-2877
Jira NVIPC-2484
Change-Id: I67df4b78e57b6de36f9bfaf966978f7ee875d596
Signed-off-by: Deepak Badgaiyan <dbadgaiyan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3226748
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
Reviewed-by: Janardhan Reddy AnnapuReddy <jreddya@nvidia.com>
Reviewed-by: Sivagamy Govindasamy <sivagamyg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Use conftest to find if API pci_disable_pcie_error_reporting()
is present. This API is dropped from Linux 6.5 with change
commit 69b264df8a41282 ("PCI/AER: Drop unused
pci_disable_pcie_error_reporting()")
Bug 4346767
Change-Id: Idcaf36e4215a874c70f7457a46fd875f1349b121
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3028741
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Fix build errors when this driver compiled against K6.1 (kernel-oot)
- Remove dma-iommu.h header inclusion as its not present in K6.1
- Define IOVA_RANGE_CACHE_MAX_SIZE if this macro is not defined
- Import DMA_BUF "MODULE_IMPORT_NS(DMA_BUF);" to avoid below error
"ERROR: modpost: module nvscic2c-pcie-epc uses symbol dma_buf_* from
namespace DMA_BUF, but does not import it"
Bug 3978996
Change-Id: Idd9a53b19c63467583b87f64ffa2c2e888ac02e1
Signed-off-by: Shardar Mohammed <smohammed@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2898149
Reviewed-by: Deepak Kumar Badgaiyan <dbadgaiyan@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
nvscic2c enables xfer between two SoC connected over PCIe.
nvscic2c already available with K5.10
Major changes in nvscic2c-pcie for K5.15:
Integrate with upstream PCIe endpoint function changes.
Allocate new IOVA domain to be used for
empty IOVA allocation.
This IOVA range would be used in iommu_map() to map
physical backing with IOMMU domain attached in PCIe device.
Migrate from nvhost to host1x and tegra-drm interfaces.
Bug 3739487
Jira C2C-826
Jira C2C-830
Change-Id: Ic4d8ac680921807fb17247855ca7037623681cb7
Signed-off-by: dbadgaiyan <dbadgaiyan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2810806
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Arihant Jejani <ajejani@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
