In absence of bl_debug_data parameter passed from Bootloader, value of
tegra_bl_debug_data_start will be 0.
This triggers a kernel panic on systems where parameter is not specified
and the module is loaded.
Fix this by first checking tegra_bl_debug_data_start and
tegra_bl_debug_data_size before accessing them.
Also add a check upfront to check if mandatory bootloader parameter
tegra_bl_prof_start is passed or not. If this parameter is not passed,
bail out the driver initialization.
Bug 3996651
Change-Id: Ibb78d6cefdae1f79ecb09836b833899deacb03ce
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2900710
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
CERT-C is reporting following issue:
- Casting cvsram_slice_data[1] from unsigned int to int without checking
its value may result in lost or misinterpreted data.
Fix this by changing the data type of slice_size.
CID 490074
Bug 3745813
Change-Id: Ic52fd016798310b69da69247a6eb2d7a626a4146
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2828530
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
In function nvcvnas_power_off casting nvcvsram_readl from unsigned int
to int without checking its value may result in lost or misinterpreted
data. Fix this by changing data type of val to u32.
CID 427418
Bug 3512545
Change-Id: I8be65b1ca73270a4a0d76380207078da745c7057
Signed-off-by: Sagar Gulab Patil <sagargulabp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2747340
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
In function nvcvnas_probe casting cvsram_slice_data[0] from unsigned
int to int without checking its value may result in lost or
misinterpreted data. Fix this by changing data type of variable.
ID 490074
Bug 3512545
Change-Id: Ia9f141f14a540f9c2c436bf605d4aec8f3489fb5
Signed-off-by: Sagar Gulab Patil <sagargulabp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2738506
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
When cvnas driver is build as OOT module, it is required
to set the following config.
CONFIG_TEGRA_FUSE_UPSTREAM
CONFIG_TEGRA_CVNAS
Set these config when CONFIG_TEGRA_OOT_MODULE is set.
Bug 3583599
Change-Id: I8deffa609cfc7abf6c9efd69405295077649c8b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2715735
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
By exporting cvnas_dev all the internal data of the driver is getting
exposed to any driver that uses it. This could allow drivers to corrupt
this driver data. Hence do not export cvnas_dev, use helper functions to
get it's required member elements from nvmap.
Bug 200722684
Bug 3528414
Change-Id: I17f6fa1e98c777a7ec9118dbc6f0c6359e949f22
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2704698
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Handle dependencies between nvmap and cvnas driver:
- nvmap_register_cvsram_carveout function is called by cvnas driver
(builtin driver for 5.10) and it's definition is present in nvmap driver
(builtin driver for 5.10, but we are trying to make LKM). This is
resulting into build issues while making nvmap as LKM for 5.10
- One option to resolve this is by making cvnas driver as LKM for 5.10
But nvhost, nvdla, cbb are not LKM for 5.10 and are calling functions
defined in cvnas driver e.g. nvcvnas_get_cvsram_base, hence we can't
make cvnas as LKM for 5.10
- Second option is to get rid of the call nvmap_register_cvsram_carveout
from cvnas driver. This approach is implemented in this patch.
- Export cvnas_dev from cvnas driver, do not call the above function
from cvnas driver. During nvmap probe, nvmap itself would call the above
function, as cvnas_dev is exported , it's being used in nvmap driver to
get base, size etc. information, which is needed as argument to above
function, which will register the cvnas carveout in case of 5.10
Bug 200722684
Change-Id: I32e5694386de4a7fef65c3f67ffb9b5066f62ab3
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2678685
The CVNAS clock does not support dynamic frequency scaling and
it is always expected to run at max rate. When its frequency is
capped at runtime via clock_cap sysfs node, forcefully change
current rate to capped max rate.
Bug 3510538
Change-Id: I133865dbd8cfe58182dca3e6b2b969b99df393b0
Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2665653
Sparse generates the following warnings for the CVNAS driver ...
drivers/platform/tegra/cvnas/cvnas.c:126:5: warning: symbol
'nvcvnas_busy' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:138:5: warning: symbol
'nvcvnas_idle' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:444:13: warning: symbol
'nvcvnas_get_cvsram_base' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:456:8: warning: symbol
'nvcvnas_get_cvsram_size' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:468:5: warning: symbol
'is_nvcvnas_probed' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:476:5: warning: symbol
'is_nvcvnas_clk_enabled' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:779:5: warning: symbol
'nvcvnas_busy_no_rpm' was not declared. Should it be static?
drivers/platform/tegra/cvnas/cvnas.c:793:5: warning: symbol
'nvcvnas_idle_no_rpm' was not declared. Should it be static?
There are a few problems here which are:
1. The CVNAS driver does not include the 'cvnas.h' header file and so
some of the declarations are not found.
2. Some of the CVNAS functions are not declared in the 'cvnas.h' header
file and need to be added.
3. The Tegra19x CBB driver is a user of these CVNAS functions, but
instead of including the 'cvnas.h' file it defines prototypes for
these functions. This is not necessary and so we can remove these
prototypes and simply include the 'cvnas.h' header file.
4. The function definition nvcvnas_idle_no_rpm() in the CVNAS driver is
incorrect and this function should not have any arguments passed to
it and currently does not match the prototype.
Bug 3528414
Change-Id: I7945f8c66ceb5ca5b158b7ed1b81a50f19c52bb7
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2670149
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
The compatible string for CVNAS devices has been updated from
"nvidia,tegra-cvnas" to "nvidia,tegra194-cvnas" to conform with the
upstream policy of stating the actual device it is supported on. The
'nvidia,tegra-cvnas-hv' has been left as-is because this is a special
case for virtualisation.
The CVNAS driver is only support for Tegra194 devices and so it is not
necessary to check the actual device variant, just the device SKU.
Finally, instead of populating platform data in the device-tree table
we can simply use the compatible string itself to detect if the device
support virtualisation.
Bug 3459526
Change-Id: I9755e8277892445b3e6772b8fa0b1960a34d90f4
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2657909
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
When building the CVNAS driver as an external module against upstream
Linux kernels, there are some downstream fuse APIs that are not found.
To fix building CVNAS for upstream kernels ...
1. Use the device-tree machine compatibility string instead of the
downstream fuse function tegra_get_chip_id().
2. For the functions tegra_platform_is_silicon() and
tegra_platform_is_sim() add implementations in a fuse-helper.h
that always assume that platform is silicon and not a simulator.
Note this assumption is only applied to upstream kernels and
downstream kernel still use the downstream implementation. Long
term we need to revisit this.
3. Copy the downstream implementation for function tegra_get_sku_id()
to the fuse-helper.h so that this is available for upstream kernels.
The functions implemented in fuse-helper.h are only used if the compiler
flag CONFIG_TEGRA_FUSE_UPSTREAM is defined.
Bug 3459526
Change-Id: I5bbd08ac2560c236f932606ce5ad0e73dc71205a
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2650491
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Prepare for building the CVNAS driver as a module by adding the
necessary Kconfig option. In order to build the driver as an
external module, move the source into its own sub-directory and
add it own Makefile so that it can be built independently of other
drivers.
Bug 3459526
Change-Id: I87ce24852c561144313849774d5031821b6c3a47
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2650490
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
The Tegra MCE driver is currently built as two kernel modules which are
tegra-mce.ko and tegra23x-mce.ko. The tegra-mce.ko module simply exports
functions that other drivers can use and the tegra23x-mce.ko modules is
dependent upon this. Instead of building these as two separate kernel
modules we should build as one. Even in the future, if support for other
SoCs is added we can still have a single driver that supports all SoCs.
Rename the file tegra-mce.c to mce.c and update the Makefile so that the
single kernel module produced is called tegra-mce.ko.
Bug 4078818
Change-Id: I5cd7d09f9defb77de4109a89adf1c1384f6b076c
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2890818
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
It is possible that we received the ACK from DCE even before we
start waiting. But currently we are clearing the "complete" state
before start waiting, which may result in missed interrupt.
This patch removes the clearing of complete state before wait.
Also Adds few comments for better understanding.
Bug 3941557
Change-Id: I7d2efb1a64eb6f2d4df1876add07a8f019b449f5
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2845498
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
The current code doesn't notify DCE IPC after DCE IPC is in ACK state
Current Flow:
CPU DCE
1: tegra_ivc_init ---------
2: DCE_ADMIN_CMD_IPC_CREATE tegra_ivc_init
3: --------- tegra_ivc_channel_reset
dce:SIVC_STATE_SYNC
cpu:ESTABLISHED
4: tegra_ivc_reset
dce:SIVC_STATE_SYNC ---------
cpu:SYNC
5: Notify() tegra_ivc_channel_notified
dce:SIVC_STATE_ACK
cpu:SYNC
6: tegra_ivc_notified ---------
dce:SIVC_STATE_ACK
cpu:ESTABLISHED
After Step 6 DCE state is in ACK state and CPU state is in ESTABLISHED
state. As there is no further cpu->dce notification in RM_NOTIFY
channel, dce state stays in the "ACK" state and any attempt to send msg
on RM_NOTIFY channel from dce->cpu fails.
This patch notifies dce after step-6, So dce channel is also in the
"ESTABLISHED" state.
If steps 3-6 get executed in CPU before Step 5 in DCE gets a chance
to execute (DCE is slow), the CPU IPC state will change to "established".
Now when step 5 will execute in DCE, it'll see the CPU state as
"established" so, It'll make the DCE state also "established".
That's how it's working today.
Bug 3861985
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Change-Id: Ieb13f525d3f81b30aaae848d8d5adb1106856b65
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2840065
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
While MST is used, We get two async msgs from DCE and schedule 2 worker
threads, But during processing (dce_client_process_event_ipc) of these
messages, We are processing all the pending messages in one go. So,
while the second worker thread is scheduled, there is no new message
to read.
This Patch fixes the loop to try reading only when there is a new msg to
read. Also convert info print to debug, to avoid print noise.
Bug 3801736
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Change-Id: Iddf9ea8f0194539baa8c52616e2f836527400176
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2810440
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
