Commit Graph

5 Commits

Author SHA1 Message Date
Mikko Perttunen
60b43d6545 gpu: host1x: Request syncpoint IRQs only during probe
Syncpoint IRQs are currently requested in a code path that runs
during resume. Due to this, we get multiple overlapping registered
interrupt handlers as host1x is suspended and resumed.

Rearrange interrupt code to only request IRQs during initialization.

Bug 4658418

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I25e129452aeb39c23aa2d6f6a54729f60390d088
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3145171
Reviewed-by: Santosh BS <santoshb@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2024-07-06 00:09:14 -07:00
Mikko Perttunen
a351c7681e gpu: host1x: Timestamp syncpoint wait completions
Collect CLOCK_MONOTONIC timestamps in the interrupt handler when
a syncpoint wait completes, and report it back in dma_fences and
syncpoint wait UAPI.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I9f783833698df7d96c99c9ffef3205aa82adceb5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2801167
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-04-03 12:36:25 +00:00
Mikko Perttunen
33a40367c0 gpu: host1x: Rewrite syncpoint interrupt handling
Move from the old, complex intr handling code to a new implementation
based on dma_fences. While there is a fair bit of churn to get there,
the new implementation is much simpler and likely faster as well due
to allowing signaling directly from interrupt context.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I81c47fa1946679813f90e3fd8e1d1e9d6342143e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2786635
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-03 12:36:25 +00:00
Jon Hunter
27ced8b315 gpu: host1x: Update to UAPI series v5
Update the host1x driver to the 'Host1x/Tegra UAPI v5' series [0]. This
fixes a few minor bugs found in the previous series.

[0] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=223684

Bug 200687525

Change-Id: I680bfb9e8db73b9e2571551f22fadca1f2974498
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2469983
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-03 12:36:25 +00:00
Jon Hunter
cc5bcef3f6 gpu: host1x: Add upstream host1x driver
Add the upstream host1x driver with the 'Host1x/Tegra UAPI' series [0]
applied. This driver will be built as an external module for use with
the NVGPU driver on upstream Linux kernels.

The following modifications have been made to the series posted upstream
1. Update the Makefile to always build the driver as a module
2. Remove the tests to see if CONFIG_DRM_TEGRA_STAGING is enabled
3. Rename the include/linux/host1x.h to include/linux/host1x-next.h to
   avoid conflicts with upstream headers when building as an external
   module.
4. Rename the include/uapi/linux/host1x.h to
   include/uapi/linux/host1x-next.h to avoid conflicts with upstream
   headers when building as an external module.
5. Rename the module that is built to be host1x-next.ko instead of
   host1x.ko to avoid any depmod conflicts with the upstream driver.

[0] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=215770

Bug 3156385

Change-Id: Ic60299546809097dd0e4a9a7157bce1491d9f794
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2435801
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-04-03 12:36:25 +00:00