Currently dynamic pinmux configuration for I2S, DMIC, DSPK modules
are present in runtime_resume() function which can be called even
without any audio usecase active on these modules. So this destroy
the purpose of programming pinmux only during stream active state.
This change has moved the dynamic pinmux code in these drivers to
dai ops callback of startup and shutdown which will ensure the
pinmux config happens only during the stream playback/capture.
Bug 200497486
Change-Id: I3c4e8a96d0d066b38c9aba5ffe530db5cf5246fc
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2029745
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
On k4.4 and earlier, t210 MBIST workaround was handled with notifier
callbacks within the drivers. Remove all such calls to the functions
slcg_register_notifier and slcg_unregister_notifier.
Also remove the functions nvhost_pd_slcg_install_workaround and
nvhost_pd_slcg_remove_workaround which ultimately call the
slcg_register_notifier and slcg_unregister_notifier functions
respectively.
Bug 2485656
Change-Id: I6445e07e5d2a4aa6360fff0bbd32ceebbc0e62e4
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2003556
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
The names of the I2S mixer controls for mono/stereo conversion are
confusing from a user perspective because the controls 'I2Sx TX mono
to stereo conv' and 'I2Sx TX stereo to mono conv' are for capture and
the controls 'I2Sx RX mono to stereo conv', 'I2Sx RX stereo to mono
conv' and 'I2Sx Rx fifo threshold' are for playback. The naming
convention for these controls comes from the XBAR CIF and makes sense
from that standpoint. However, from a user and userspace perspective
the names are confusing and misleading. Therefore, add new controls
that are explicitly named "Capture" and "Playback" so it is clear
which should be used.
The legacy controls will be kept for Android until the appropriate
userspace changes have been made so that these can be removed
completely.
Bug 200469957
Change-Id: I93ae9339128a056e2144ba751a86f9df21b3dfda
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
(cherry picked from commit 843dfa3a418d336bca49144e065556dce8d0cd4e)
Reviewed-on: https://git-master.nvidia.com/r/2002204
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
When the number of channels for an I2S interface is overridden from
userspace, if the I2S interface is being used in TDM mode where there
are more than 2 channels, the I2S SLOT_CTRL register may not be
configured correctly.
For example, if using the AMX to the multiplex 4 mono channels into
a single 4 channel TDM stream that is then routed to an I2S interface,
the number of channels seen by the I2S interface is 4 where as each
input stream to the AMX only has a single channel. Therefore, the
number of channels for the I2S interface needs to be manually set to
4 from userspace. However, when this is done the I2S SLOT_CTRL
register is still configured with the default RX and TX slot mask.
To fix this, if the number of channels for the I2S interface is
overridden from userspace, then if using TDM modes, also override
the RX and TX slot mask.
Bug 2382530
Change-Id: I2df564c8e8ad5d7463a767a1e2197e26fe0c57e5
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2000401
(cherry picked from commit b888cf568c726fed1e97882b9fe8deae4d6df6d9)
Reviewed-on: https://git-master.nvidia.com/r/2002199
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
The device data for a given driver must be set before enabling
runtime-pm otherwise this could results in a crash if the runtime-pm
callback is called before the device data is set where it is expected
that the device data has been initialised.
Furthermore, most drivers will directly call the runtime-pm callback
to power-up the device if runtime-pm is not enabled in the kernel
config and so many drivers would crash if runtime-pm is not enabled.
Fix this by setting the device data early in the driver probe.
Bug 2478690
Change-Id: I5beb1607aa4715651cf4b9ac8e8068e7f8e3a2a7
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
(cherry picked from commit 9d656fcc96e85d38d120a430f83f2b734e19fe07)
Reviewed-on: https://git-master.nvidia.com/r/1991204
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Mono playback via the RT5658 codec on the Jetson TX1/TX2/Xavier is
distorted. Although the RT5658 codec is configured for standard I2S
timings (implying 2 channels), the Tegra XBAR should convert the mono
audio track from one channel to two channels. The problem is caused
because the 'CHANNEL_BIT_CNT' field in the I2S Timing Register is
being configured incorrectly. For mono playback in I2S mode (or LRCK
mode) the CHANNEL_BIT_CNT is being set to 31 instead of 15 by fixing
this mono playback works as expected.
Please note that the 'bitcnt' value programmed into the I2S Timing
Register is verified to see that it is not bigger than the mask for
the CHANNEL_BIT_CNT field. However, this is done before we shift the
bitcnt by 1 for I2S mode. Therefore, ensure the bitcnt is shifted by
1 before we do the check.
Mono playback has been tested by playing the following audio clip ...
aplay -D hw:1,0 /usr/share/sounds/alsa/Front_Center.wav
Bug 2257806
Change-Id: I4d306ccef891282e96c300d90bad2a5b6efc9968
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1777096
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
For I2S right-justified mode, the Tegra210 I2S driver assumes that
the bclk rate is 64*fs and the data is always 16-bit and therefore
sets the data offset to 16. However, the Tegra TRM states ...
"In RJ mode, data starts (r/2 – n) SCLKs after the LRCK edge
(offset = r/2 – n, where r = number of SCLKs per LRCK,
n = number of bits/sample)."
Therefore, the Tegra I2S driver should set the data position
depending on the bit-clock ratio setting and the data format
(16-bit or 32-bit) that is used.
Bug 2027259
Change-Id: Ic87b33aa19f956f4ac35c1444e4cd4148fe0ba4d
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1649565
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
DAP's which shared pins with other peripherals need
to have entry in dt for dynamic pinmux configuration.
All DAP's are not required to be configured dynamically.
Thus pinctrl for all dap's are not needed to be defined
in device-tree. For these cases state not defined should
not be treated as warning. Thus updating log level to dbg.
Bug 200377288
Change-Id: I8c222577d4bcdcfb7fde49a6c264c157baae28d1
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1633690
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Uday Gupta <udayg@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Clock resource is associated with a device and when the device
is unbound, the resource is freed. Drivers get the clock handle
by using devm_clk_get(). No need for an explicit devm_clk_put()
to release the clock, this is handled automatically when the
device lifetime ends.
Bug 200346429
Change-Id: I0885723e3a9a3fb41e54524ddacc3415f571576c
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574311
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
The 'normal' polarity of the fsync is dependent on the audio format.
For example, for I2S the 'normal' polarity for the fsync is
falling-edge/low, where as for r/l-justified or dsp modes A/B it is
rising-edge/high. This is detailed in the Tegra210 TRM in the table
titled "Programming I2S to Operate in Various Modes" and also in
the Linux kernel header file for include/sound/soc-dai.h.
The Tegra210 i2s driver always assumes that the fsync is low for
'normal' polarity and high for 'inverted' polarity and does not
account for the audio format. Correct the Tegra210 I2S driver to
set the polarity according the the audio format.
Bug 1788838
Bug 1993738
Change-Id: I5c7395f225ff8c25e2bb277c35e3ecb7a86f36cb
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1567742
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
This patch fixes compile errors for kernel 4.9. Kernel 4.9 has two
changes, struct snd_soc_codec_driver is modified and changed PCM
runtime array to a list from struct snd_soc_card.
Bug 1856400
Change-Id: I32d0d6d5d2cb79a3af27b81786d4e288d1be4d2d
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
(cherry picked from commit 9528e52063467df94bc37fe2ad10d74a1c573848)
Reviewed-on: https://git-master.nvidia.com/r/1533079
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
There are a couple issues with system suspend handling in the Tegra
ASoC codec drivers which are:
1. Most drivers the system suspend callback does nothing and this
means that if the codec device is active when suspend occurs then
the codec will not be suspended correctly. This has been seen to
cause system crashes in the I2S driver when the system is suspended
and resuming while audio playback is active.
2. The codec suspend handlers may be called twice when entering
suspend. Suspend handlers should only be called once, but currently
they are called twice; once by the PM core and once when the APE
power-domain is turned off (if it is on when suspend occurs).
Fix the above two problems by:
a). Adding proper system suspend and resume handlers for all codec
drivers, to suspend and resume the device if not runtime PM
suspended on entering suspend.
b). Remove the code to call the PM callbacks from the APE power-domain
code.
Finally, make the system suspend callbacks for these codec drivers
late suspend callbacks to ensure that the sound core has suspended
any on-going activity, before we attempt to suspend these codec
devices.
Bug 200275736
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1488953
(cherry picked from commit 610f30df70a790733ed25a1be250e08cce19f368)
Change-Id: Ia0893c8373721ed16787a6c8243dca49f9672d34
Reviewed-on: https://git-master/r/1509428
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Linux runtime PM automatically handles the runtime resuming and
suspending of a parent device and therefore, it is not necessary
for a child device to explicitly runtime resume or suspend the
parent.
The various Tegra ASoC codec drivers explicitly runtime resume
and suspend the parent device from within their runtime PM callback
handler. This should not be necessary.
Furthermore, currently the various Tegra ASoC codec drivers are
not suspended correctly if active when system suspend occurs. During
system suspend it is common to directly call the runtime PM callbacks
to suspend and resume the device if active from the system suspend
callbacks. However, the APIs, pm_runtime_get/put(), cannot be called
during system suspend and so the runtime PM callbacks for these codec
drivers cannot be called from the context of the system suspend
callbacks.
Remove the calls to runtime resume and suspend the parent device from
the runtime PM callbacks for the various Tegra ASoC drivers. This will
allow us to fix suspending and resuming of the Tegra ASoC drivers
across system suspend.
Bug 200275736
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1487805
(cherry picked from commit 60de6c68787ac100773a9f300d665266db25907c)
Change-Id: I67d429e779e84ad4c1978303ad08c4b89b95fb69
Reviewed-on: https://git-master/r/1509427
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Below are the hypothetical scenarios
- Drivers are in suspend state while reboot and PCM Open call from
userspace is received after driver shutdown [APE is power gated
already]
- PM domain handling doesn't ensure proper functionality after driver
shutdown is called
The change handles with the below fix
- ALSA PCM Open API first executes runtime resume of each driver.
So need to prevent any reg access in runtime resume of drivers.
- ALSA PCM Open executes ADMAIF startup after runtime resume of
each driver. If ADMAIF startup returns failure based on shutdown,
PCM Open operation will fail, this will break PCM Open path and
will ensure no further ALSA APIs/Callbacks are called.
Bug 200289815
Change-Id: Ia03e035569375f37ae4b0faa1a4593ce121d2354
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1475208
(cherry picked from commit 3361e95850563f3009a428bb1c01941ed069a7b0)
Reviewed-on: http://git-master/r/1492664
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
For some of the use cases we might require to program the fifo
thresholds of Rx cif. Until now we have been using fixed
values for Rx cif. This patch exports the configurability
option to the user space. If no threshold value is specified,
it uses the fixed values as per the previous state of the driver.
Threshold needs to be programmed in terms of frames, where
1 frame = no. of channels * 1 word.
Note: The same control for Tx cif is not needed as this register
is RO and not allowed to be programmed. Reset value is used for
Tx cif.
Bug 200283222
Change-Id: If1e5379dd874a0f1f6f1d9ae71465ac8c1f9f071
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: http://git-master/r/1319742
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
GVS: Gerrit_Virtual_Submit
Make use of ARCH_TEGRA_210_SOC instead of ARCH_TEGRA_21x_SOC
so that we can get rid of redundant ARCH_TEGRA_21x_SOC.
ARCH_TEGRA_210_SOC aligns to up-stream as well.
Bug 1766370
Change-Id: I10a9d9bb63b1fbac358d85a228710a208d595281
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-on: http://git-master/r/1306757
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Expose mixer controls for i2s sample rate, channel and
channel conversion in rx/tx i2s cif. This is required
to support routing of audio to codec from i2s6.
Bug 1792012
Reviewed-on: http://git-master/r/1227399
(cherry picked from commit 76118138b12220a2cdf25d44fd58fcd83090577c)
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Change-Id: I4e5471b7ca8fcf6d72ab2e0e27ed16b6adb8c94d
Reviewed-on: http://git-master/r/1201220
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
fixing kernel warnings of the form
"tegra210-i2s tegra210-i2s.[0-9]+:
Missing prop fsync-width for I2S
Either we can set the property to a value of 31
or we can make these dev_warn as dev_info.
We are going with the second option.
Bug 200178609
Change-Id: I29285925a8a88ab8119ec655133462b0714c5092
Signed-off-by: Gaurav Singh <gaursingh@nvidia.com>
Reviewed-on: http://git-master/r/1207583
(cherry picked from commit c2bf779f429f5fb02a787026bcc99a22e7a647b4)
Reviewed-on: http://git-master/r/1210057
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
This commit has changes needed for audio on kernel 4.4
- select SND_DYNAMIC_MINORS for tegra-alt
- use snd_soc_new_compress callback function in snd_soc_dai_driver
instead of setting compress_dai = 1
- use snd_soc_dapm_to_codec() to access codec from widget
Bug 200193757
Change-Id: I1744ca93786086691cb6eabdde33125a995de9e7
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/1158639
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
i2s clock is required to be configured
only when controller is programmed as master.
Also when clock source is sync clock need to
program the sync clock selector to pick correct
external clk.
Bug 1747842
Change-Id: Iadddebb21f7b0990114f4ad25093638ab996ce9f
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1139580
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Tested-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Nitin Pai <npai@nvidia.com>
Added support in i2s driver to have an option
to drive an i2s in master mode from another
i2s sync clock
Bug 1733691
Change-Id: I2f2b7bbdbbdf8af97e6aef4563d5729b8f2d8c52
Signed-off-by: Sidharth <svarier@nvidia.com>
Reviewed-on: http://git-master/r/1118980
Reviewed-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Nitin Pai <npai@nvidia.com>
Moving sw-reset at PRE_PMU stage where we
reset i2s controller it start of playback/
capture to clean up fifo's in case last run
was not good.
Bug 1736992
Bug 200181219
Change-Id: I716eb736242440360dc1e13426a69adfac08c6ed
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1112855
Reviewed-by: Nitin Pai <npai@nvidia.com>
Audience require 32 bits/channel for power optimized routes.
Added k-control to update 12S bit width. This change will also take care
of converting XBAR_BITS to CLIENT_BITS by padding zeros from LFSR to LSB
DAI format is hardcoded to 32 bits in Audience codec driver.
Bug 200118587
Change-Id: I3cf35977e8ba57d83084bd86ae6a2720a6acde7e
Signed-off-by: Srinivas Anne <sanne@nvidia.com>
Reviewed-on: http://git-master/r/830893
(cherry picked from commit a7b79a1b71e4e11cad1fb323e8ccbcd42894a2a0)
Reviewed-on: http://git-master/r/832487
Reviewed-on: http://git-master/r/1028395
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Move register store/restore from pm API's to
runtime API's for platforms, with CONFIG_PM_SLEEP
not enabled, to work.
Bug 200166409
Change-Id: Ifcdd78206b3ac59edc8ba1279316cfa8c87e7204
Signed-off-by: Uday Gupta <udayg@nvidia.com>
Reviewed-on: http://git-master/r/932101
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
add check for context pointer before accessing it in suspend.
Also move setting of driver data at the end of probe function.
Change-Id: I5724ee810dd3ca409412aa21d61d35519b1432a3
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/921743
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
- rx soft reset should be set for playback case
and tx soft reset for capture case
- make soft reset registers writable by regmap
Change-Id: I840332e9ae30506c16c22ad423dc5e264188a858
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-on: http://git-master/r/818828
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
Tested-by: Nitin Pai <npai@nvidia.com>
Use the devm_clk_put function instead of clk_put i
to avoid kernel panic when clk_get fails
Bug 1687658
Change-Id: I2ab31667dfdec4298d87a9a1d2d427954880b41d
(cherry picked from commit 2874a4278430d482b0309b954c36e7300807f9ae)
Reviewed-on: http://git-master/r/802540
Signed-off-by: Asha T <atalambedu@nvidia.com>
Reviewed-on: http://git-master/r/807794
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Add the common clock framework support changes to audio drivers.
the change replaces the clk_get_sys() with devm_clk_get()
Bug 200127320
Change-Id: Ie97b127b302c6e7806b60dc4c11986acb1694525
(cherry picked from commit 8730fbc8a2cfee13229fed9ded529c62c7fc9eee)
Reviewed-on: http://git-master/r/792739
Signed-off-by: Asha T <atalambedu@nvidia.com>
Reviewed-on: http://git-master/r/807788
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
In k3.18 snd_soc_kcontrol_codec should be used to access
codec instead of snd_kcontrol_chip
Bug 200123169
Change-Id: I5bfdb7ebbbe601df9d580727be00786617abab3f
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-on: http://git-master/r/784591
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Make modifications, so that powergate partition-id for APE
is always read from device tree.
Bug 200105664
Change-Id: I10d3632a4bdaf2b37690f19be82c5431c0c71c7c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/730743
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/763551
GVS: Gerrit_Virtual_Submit
1. Remove replicate bit and add fifo_size_downshift bit
in cif
2. Update mask value for dma_fifo_size, dma_fifo_start_addr
and dma_fifo_threshold in admaif driver
3. Update the copyright
4. Add run time check function to detect FPGA
Bug 1582514
Bug 1582510
Change-Id: I40a8172ebc3713ead4cb5764f291f04d548c7a75
Signed-off-by: Junghyun Kim <juskim@nvidia.com>
Reviewed-on: http://git-master/r/751602
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Tested-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
- removed snd_soc_codec_set_cache_io function
- use snd_soc_kcontrol_codec instead of snd_kcontrol_chip
- use codec->component.val_bytes instead of codec->val_bytes
- use devm_ioremap_resource instead of devm_request_and_ioremap
- snd_soc_dapm_mux_update_power prototype is changed
Change-Id: Ieb699a0e8a12b341c6823337ef2deb0d99292240
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
I2S_CYA register is a spare register reserved for any issue
in design. I2S4 has "i2s4a" and "i2s4b" pins in the pinmux.
In order to select i2s4b pin for I2S4 instance, we need to
enable CYA register
Bug 1602439
Change-Id: I42c401a301efb648e1141159367038a084718a93
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/677018
(cherry picked from commit ecae3a30ba4bd9333872f1aff6e6215169fd16d0)
Reviewed-on: http://git-master/r/679674
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Justin Kim (SW-TEGRA) <juskim@nvidia.com>
Reviewed-by: Uday Gupta <udayg@nvidia.com>
Set default register values for AHUB modules in regmap. This will
ensure after runtime suspend/resume AHUB register POR values
does not get reset to 0.
Bug 200039212
Change-Id: I38e4c04721450b7511404c0db2911b314b68a880
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/603339
Set idle_bias_off for all t210 xbar modules to ensure module runtime
suspend/resume works when module is idle.
Ensure regcache is synced back to hardware during runtime resume so
that register content does not get lost if it is written during
runtime suspend state.
Add suspend APIs for all module to mark regcache dirty while device
goes into suspend to ensure register values does not get lost across
system suspend/resume.
Change-Id: I2828beeed859df4f8084dd70bbcde5ed62f2525c
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/555028
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit
Instead of using duplicate clock of "d_audio" for all AHUB modules
get/put runtime pm reference of the parent module from runtime_pm
suspend/resume routine of all AHUB modules. This will ensure AHUB
xbar is up before other drivers tries to access any register. Also
it will ensure both d_audio and APE clocks are enabled when needed.
Bug 200042312
Change-Id: I0346728f15b135bb619de40fbd3fc440a5505940
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-on: http://git-master/r/554863
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
GVS: Gerrit_Virtual_Submit
When using RBTREE cache, there can be allocations the first time
a register is accessed. This can cause an attempt to schedule while
atomic in the case that the regmap is using a spinlock. This can be
resolved by using a flat cache.
Bug 200041820
Change-Id: Id69592cd5fadbb5ad9ccfdbb1f184733a332512c
Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Reviewed-on: http://git-master/r/552940
